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Suppose that in 500 memory references there are 50 misses in the first level cache and 20 misses in the second level cache.Assume miss penalty from the L2 cache to memory is 100 cycles.The hit time of L2 cache is 20 cycle.The hit time of the L1 cache is 10 cycles. If there are 2.5 memory references per instruction.How many average stall cycles per instructions are there?
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Average stalls per instruction = $\frac{Memory\ Access}{Instruction} \times \frac{Miss}{Memory\ Access} \times\frac{Cycles}{Miss}$

avg stalls per instruction = stalls due to L1 miss + stalls due to L2 miss
$=2.5 \times \frac{50}{500} \times 20 + 2.5 \times \frac{20}{500} \times 100\\ =5+10\\ =15$

ref: http://cs.uwec.edu/~buipj/teaching/cs.352.f12/lectures/lecture_08.html

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Please tell me whether this way is correct or not. I got same answer. :P

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3 votes

 #instruction=memory reference/ memory reference per instru.=500/2.5=200

Avg Stall per instruction= (Miss in L1/#instruction)* Hit in L2+( Miss in L2 /#instruction)* Miss Penalty in L2

                                          =(50/200)*20+(20/200)*100

                                          =5+10

                                          =15

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anyone elaborate the reason for each stall cycles.
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