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LW R4  # 400
LW R1, 0 (R4)

pls show the pipeline diagram for these two instructions with operand forwarding and without operand forwarding case
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if we take rics processor with 5 stage 1. fetch 2. operand fetch and decode 3. execute 4.memory access 5. write back

if we use operand forwarding then

   F   OF   EX  MA  WB

        F     OF    EX   MA   WB

here operand forwarding take place from execute stage to operand fetch

But if not use

then

    F OF EX MA WB

       F                          OF   EX MA WB

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