Computer Architecture

Question

I am getting answer as 9 , the given answer is 8.

Comments

Ans should be 8 itself, 4 instruction 5 stages Ist instructruction will be completed at 5th cycle, then 6,7 and 8, no stall will be there as all hazards will be removed by forwarding.

---

Ahh, sorry my mistake.

So basically even if OF stage for second instruction takes wrong value they will be corrected by operand forwarding !

---

Actually OF stage here is 3 so by that time we will be having correct input. This isn't the case where Ist it is fed wrong input and forwarding will update it. this isn't possible at all. thing is if we are getting correct input by OF stage then proceed otherwise stall. Like if OF is at 2nd stage then we have to insert a 1 stall.

---

Answer will be 8 ,as here operand forwarding is used

---

yup, 8 cycles.

---

But shrestha, 

Is my above reason correct ? - 

So basically even if OF stage for second instruction takes wrong value they will be corrected by operand forwarding 

---

yes, you are right.

Answer 1

	1	2	3	4	5	6	7	8
I1	IF	ID	OF	EX	WB
I2		IF	ID	OF	EX	WB
I3			IF	ID	OF	EX	WB
I4				IF	ID	OF	EX	WB

in this question instruction I1 perform the addition operation and result store in ALU in clock cycle 3 and next instruction I2 use the result which is store by instruction I1 using operand forwarding !

hence the total clock cycle is 8.