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Consider a processor with an ideal CPI without memory stalls for each instruction type as follows:

$$\begin{align*} \begin{matrix} &\text{ALU} &= 1 \\ &\text{Load/Store} &= 1.5 \\ &\text{Branch}&=1.5 \\ &\text{Jump}&=1 \\ \end{matrix} \end{align*}$$

And consider a program which consists $40$% ALU operations, $30$% load and store, $20$% branch and $10$% jump instructions. Assume $2$-way set associative Level-$1$ separate cache for data and instruction. Data cache and instruction cache miss rate are $20$%, $10$% respectively. Miss Penalty for data cache and instruction cache is $50$ cycles, then calculate the effective CPU time?

A] $8.25$

B] $9.25$

C] $8.625$

D] $9.34$
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Let us calculate effective CPI here as we need to find in no of cycles only.

Given that there may be either instruction cache miss or data cache miss accordingly we will have each stall..

So CPI(if it is an ALU instruction)  = CPI(ideal) + Stall / instruction

                                                  =  1 + 0.1 * 50 

                                                  =  6

CPI(if it is a branch instruction)     =  1.5 + 0.1 * 50

                                                  =  6.5

CPI(if it is a jump instruction)        =  1 + 0.1 * 50

                                                  =   6

CPI(if it is a load/store instruction) =  1.5 + 0.1 * 50 + 0.2 * 50

                                                  =   16.5

Therefore effective CPI                =    0.4 * 6 + 0.3 * 16.5 + 0.2 * 6.5 + 0.1 * 6

                                                  =    2.4 + 4.95  + 1.3 + 0.6

                                                  =    9.25 cycles

Hence B) should be correct answer..

                                                 

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