Consider a memory system consists of a single external cache with an access time of 30ns and a hit rate of 0.85, and a main memory with an access time of 80ns. Now we add virtual memory to the system. The TLB is implemented internal to the processor chip and takes 4ns to do a translation on a TLB hit. The TLB hit ratio is 95%, the segment table hit ratio is 100% and the page table hit ratio is 50%. What is the effective memory access time of the system with virtual memory?
is 50%. What is the effective memory access time of the system with virtual memory?( Marks: 0.00 )
- 8ns
- 30ns
- 40ns
- 51ns