3 votes 3 votes Can anyone explain me definition of these two?I am not talking about formulas,only behaviour/definition. CO and Architecture co-and-architecture + – rahul sharma 5 asked Jan 21, 2017 retagged Nov 13, 2017 by Arjun rahul sharma 5 2.8k views answer comment Share Follow See all 0 reply Please log in or register to add a comment.
Best answer 18 votes 18 votes u want to search for a book ..it is either with ur mom or with ur dad... one way is first go to ur mom..if she says yes she have ur book..then fine... else go to ur dad...hierarchial memory organisation... if first time ur mother says no then u wasted that time and then goes to ur dad...same way if u dont find ur word in first level memory than u have to go to second level and time of first level will also be added.. second way is like u have ur duplicate and both of u goes simultaneously..one to ur mom and other one to ur dad...if u find the book from ur mom..then ok...else u'll get it from ur dad but both these things are happening together...so no need to add double the access time...this is simultaneous memory access...u r trying to access all levels of memory simultaneously... sudsho answered Jan 21, 2017 selected Jan 21, 2017 by vijaycs sudsho comment Share Follow See all 15 Comments See all 15 15 Comments reply rahul sharma 5 commented Jan 21, 2017 reply Follow Share Thanks for nice story to undertand.:)I have folowing doubts:- 1. What will happen in hierarchial organization,if there is a miss? I think we goto next level,say main memory and search for it as you explained,but once we have got it from main memory,then will it be copied to cache also?Am i right?Will that time be accountable? 2. What will happen in simultaneousorganization,if there is a miss? Will we be bringing word to cache also?Will that time be accountable?I dont have a clue ,please help here. 0 votes 0 votes sudsho commented Jan 21, 2017 reply Follow Share locality of reference is always there...if u fetch a word ..neighbouring ones will also come with that.. but if u r jst accessing a word and dont worry what will happen after this...then if miss in hierarchial then u have to add the access time of that level also if miss in simultaneous then u need not add access time of that level 0 votes 0 votes rahul sharma 5 commented Jan 21, 2017 reply Follow Share I mean do if there is a miss in cache then we will access from main memory,then will we bring that word into cache also?Shall we consider that as a part of this concept? 0 votes 0 votes sudsho commented Jan 21, 2017 reply Follow Share it purely depends on ur implementation ...how u have modelled ur orginsation...but in reality yes we do..so that next time it could be a hit 0 votes 0 votes rahul sharma 5 commented Jan 22, 2017 reply Follow Share I didnt get that point.Let me try to ask in other ways. 1, In simultaneous organization,we access every memory in parallel,but they must be accessed one after another,right?Otherwise the access time will always be the last level time as main memory takes more time?If this thinking is true that why dont we add cache access time while calculating main memory time like in hierarchial? 2. In simultanous organization if there is a miss then CPU directly access from main memory ,but if it will not bring back to cache memory then how will cache get any data here? 0 votes 0 votes Bikram commented Jul 9, 2017 reply Follow Share @ rahul sharma 5 In simultaneous organization,we access every memory in parallel,but they must be accessed one after another,right ? Wrong. All memory access is done at the same time. we add cache access time while calculating total access time in hierarchical . In hierarchical Tavg = Hit rate * Cache access time + Miss rate * ( Cache access time + MM access time ) In simultanous organization if there is a miss then CPU directly access from main memory ,but if it will not bring back to cache memory then how will cache get any data here? In simultaneous we access all cache and MMU at the same time , so if there is a miss in cache we access data from MMU directly . 1 votes 1 votes bhuv commented Aug 10, 2017 reply Follow Share MMU ? MMU is used for translation of address, right ? So in simultaneous organisation the formula would be something like T= hit rate*(cache access time) + miss rate* (main memory access time) As we are finding our word in parallel in both cache and main memory ? What if there are L1 and L2 cache and memory ? Will formula become T= h1*(cache1)+(1-h1)*(h2*(cache2)+(1-h2)*(memory access time))? 0 votes 0 votes Bikram commented Aug 10, 2017 reply Follow Share @ bhuv MMU = Main Memory Unit or main memory , whatever you say .. So in simultaneous organisation the formula would be something like T= hit rate*(cache access time) + miss rate* (main memory access time) Yes , correct. This formula is use for simultaneous access only. Yes, we approach parallely for our data in cache and main memory at the same time. -------- In hierarchical access we use this formula : T= hit rate*(cache access time) + miss rate* ( cache access time + main memory access time) and hierarchical access is more practical in real world scenario. ------------- What if there are L1 and L2 cache and memory ? Will formula become T= h1*(cache1)+(1-h1)*(h2*(cache2)+(1-h2)*(memory access time))? it would be : in case of simultaneous access : T= h1*(cache1 access time)+(1-h1)* (cache2 access time)+(1-h2)*(memory access time) 2 votes 2 votes bhuv commented Aug 10, 2017 reply Follow Share @Bikram sir Not able to get last formula, I'm not clear when things goes beyond 2 devices. Why h2 is not considered and why there is no (1-h1)*(1-h2) for main memory ? 0 votes 0 votes Bikram commented Aug 11, 2017 reply Follow Share @ bhuv go through this thread this is the thread https://gateoverflow.in/130206/co-hierarchical-vs-simultaneous-memory-organization and check all the links also which i provide. In hierarchical we use following formula:- 1.Tavg= H1*T1+(1- H1)* (T1+T2) also see these threads : https://gateoverflow.in/14480/formula-write-back-write-through-access-time-parallel-serial https://gateoverflow.in/36416/effective-access-time-vs-average-access-time 1 votes 1 votes Bikram commented Aug 11, 2017 i edited by Bikram Aug 17, 2017 reply Follow Share Why h2 is not considered and why there is no (1-h1)*(1-h2) for main memory ? Read the discussion in this thread.here we exactly discuss about it .. https://gateoverflow.in/130206/co-hierarchical-vs-simultaneous-memory-organization with L1 , L2 and L3 Avg Access Time = H1 T1 + (1- H1)H2 T2 + (1- H1) (1- H2)H3 T3 1 votes 1 votes hem chandra joshi commented Aug 21, 2017 reply Follow Share @bikram sir corresponds to this comment https://gateoverflow.in/108780/simultaneous-vs-hierarchical-memory?show=143111#c143111 Tavg=h1 t1+(1-h1)h2 (t1+t2)+(1-h1)(1-h2)(t1+t2+t3) (hierarchical amat) Tavg=h1t1+(1-h1)h2 t2+(1-h1)(1-h2)t3 (simulatenously amat) is it right? 1 votes 1 votes Bikram commented Aug 22, 2017 reply Follow Share @ hem chandra joshi It would be i think.. in simultaneous organisation the formula would be something like T= hit rate*(cache access time) + miss rate* (main memory access time) Simultaneous AMAT Tavg = h1 t1+ (1- h1) t2 + (1- h1) (1- h2) t3 --------------------- Hierarchical AMAT Tavg = h1 t1+ (1- h1) (t1+t2) + (1- h1) (1- h2) (t1+t2+t3) 3 votes 3 votes sushmita commented Sep 24, 2017 reply Follow Share awesome analogy 0 votes 0 votes `JEET commented Sep 29, 2019 reply Follow Share That was a really good analogy. 0 votes 0 votes Please log in or register to add a comment.