0 votes 0 votes CO and Architecture co-and-architecture cache-memory + – harshit agarwal asked Jan 23, 2017 retagged Nov 13, 2017 by Arjun harshit agarwal 449 views answer comment Share Follow See all 2 Comments See all 2 2 Comments reply mohit chawla commented Jan 27, 2017 reply Follow Share i think both are correct! what's the answer ?? 0 votes 0 votes shraddha_gami commented Mar 11, 2017 reply Follow Share Only s2 are correct Conflict miss B'cz even we have lots of other space we are not going to use that. Capacity miss If we increase the cache associativity then no. Of sets decrease...and it is more flexible. 0 votes 0 votes Please log in or register to add a comment.
Best answer 1 votes 1 votes i think Compulsory miss can be reduced by increasing the Block (line) size , Capacity miss can be reduced by by increasing the Cache memory size Conflict miss can be reduced by doule the associativity . so only S1 is correct Raj_Choudhary answered May 25, 2017 selected May 25, 2017 by Arjun Raj_Choudhary comment Share Follow See all 0 reply Please log in or register to add a comment.