1 votes 1 votes A memory system of size $16 \;\text{K}$ bytes is required to be designed using memory chips which have $12$ address lines and $4$ data lines each. The number of such chips required to design the system is: $2$ $4$ $8$ $16$ CO and Architecture isro-ece isro2013-ece co-and-architecture memory-interfacing + – sh!va asked Feb 27, 2017 • retagged Dec 4, 2022 by Lakshman Bhaiya sh!va 489 views answer comment Share Follow See all 0 reply Please log in or register to add a comment.