ISRO 2007- ECE Shift Register

Question

The shift register shown in the given figure is initially loaded with the bit pattern 1010. Subsequently the shift register is clocked, and with each clock pulse the pattern gets shifted by one bit position to the right. With each shift, the bit at the serial input is pushed to the left most position (MSB). After how many clock pulses will the content of the shift register become 1010 again?

a) 3

b) 7

c) 11

d) 15

Comments

https://gateoverflow.in/120043/isro-2010-ece-shift-register

Answer 1

Explanation :-

let's name the bits from left to right 

Q1 = 1, Q2 = 0, Q3 = 1, Q4 = 0

SHIFT REGISTER: - IS A REGISTER WHICH IS USED TO SHIFT THE BITS FROM ONE PLACE TO RIGHT WHEN CLOCK PULSE IS APPLIED. SO WHEN THE CLOCK PULSE WILL BE APPLIED THE CONTENT OF EACH BIT AFTER THE CLOCK PULSE IS

Q1 = NEW INPUT ,Q2 = Q1, Q3 = Q2, Q4 = Q3 

THIS IS THE BASIC WORKING OF SHIFT REGISTER.

In the question, they are using 2 EX-OR Gate, if we recall that EX-OR gates are generally used to calculated number of 1's. The output will be 1 when the number of 1's are even and 0 if the number of 1's are odd. 

So, in the question, they are just calculating the number of 1's in Q2, Q3, Q4 collectively.

Now let's try to understand what is happening in each clock pulse when clock pulses applied, through the below table

Clock Pulse	Q1	Q2	Q3	Q4	Output i.e number of 1 collectively in Q2, Q3, Q4
Initially	1	0	1	0	Number of 1's are odd, Output = 1, inserted into Q1
1st	1	1	0	1	Number of 1's are even, Output = 0, inserted into Q1
2nd	0	1	1	0	Number of 1's are even, Output = 0, inserted into Q1
3rd	0	0	1	1	Number of 1's are even, Output = 0, inserted into Q1
4th	0	0	0	1	Number of 1's are odd, Output = 1, inserted into Q1
5th	1	0	0	0	Number of 1's are even, Output = 0, inserted into Q1
6th	0	1	0	0	Number of 1's are odd, Output = 1, inserted into Q1
7th	1	0	1	0

   

So, after 7th clock pulse, we will get the same bit pattern as initially we have i.e 1010.

Hence answer is b) 7.