ISRO 2006-ECE Ripple counter

Question

A Pulse train with a frequency of 1MHz is counted using a modulo 1024 ripple-counter built with J-K flip-flops. For proper operation of the counter the maximum permissible propagation delay per flip-flop stage is

a) 100 n sec

b) 50 n sec

c) 20 n sec

d) 10 n sec

Answer 1

A modulo 1024 ripple counter has 10 FF's(2¹⁰ = 1024). So total delay will be 10*x where x is delay of each FF. And period of clock pulse is 1× 10^-6 s.

Now, 10*x <= 10^-6 s which gives

x <= 100 ns so max value of x= 100 ns for prpoer operation.