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Consider the following two types of Cache Designs : 

  • Cache $1$: It is a direct-mapped cache with eight $1$ – word cache lines. The miss penalty is $8$ clock cycles.
  • Cache $2$ :  It is a two-way associative cache with $1$ – word cache lines. It can store the same total number of items as Cache $1$, but Least-recently-used is utilized to determine which items should be removed from the cache. The miss penalty is $10$ clock cycles.

Suppose there are eight memory references like  $0, \ 3, \ 14, \ 11, \ 4, \ 11, \ 8, \ 0$

If the caches being empty at beginning then how much time will these designs spend on cache miss penalties ? 

  1. Cache $1$ spends $48$ cycles and Cache $2$ spends $70$ cycles
  2. Cache $1$ spends $64$ cycles and Cache $2$ spends $80$ cycles
  3. Cache $1$ spends $56$ cycles and Cache $2$ spends $60$ cycles
  4. Cache $1$ spends $56$ cycles and Cache $2$ spends $70$ cycles
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Cache1. Total misses = 7. Total miss penalty = $8*7=56$ cycles

Cache 2. Total misses = 7 again. Total miss penalty = $10*7=70$ cycles
Answer:

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