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Carry lookahead adder works in 4 level (See diagram)

Level 1:

Here calculation of Pi and Gi is done.

Pi = Ai $\bigoplus$ Gi 

Gi = Ai . Bi 

Both will be calculated parallely and time taken is the maximum of time taken by either Pi or Gi.

As each gate delay is 1 unit time. So all Gi (needs AND gate) will come out at 1.

We don't have EXOR gate but it is implemented using NAND gate. EXOR operaition is realised as 

Each NAND gate delay is 1 unit time. So all Pi( needs EXOR gate) will come out at 3.

Time taken by level 1 is max(1,3) is 3 unit time.

Level 2:

Here calculation of PG is done.

PG= P0. P1. P2. P3. P4 which requires AND gate.

Time taken by level 2 is 1 unit time.

Level 3:

Here calculation of Ci and CG is done.

CG= G3 + G2.P3 + G1.P3.P2 + G0.P3.P2.P1 which requires OR gate.

Time taken by level 3 is 1 unit time.

Level 4:

Here again EXOR gates required which take 3 unit time (calculated in level 1)

Time taken by level 4 is 3 unit time.

Overall propagation delay is 3+1+1+3= 8 unit time. 

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