Consider a hypothetical system with 4 stage pipelining and 2 instructions. IF , ID, EX and WB are the stages.if IF ID EX take 1 cycle each in both the instructions.WB stage takes 2 cycles in I1 and 1 cycle in I2.
I1 : Writes data to R0 register in WB stage
I2 : Writes data to R1 register in WB stage
Then is this sequence in the pipeline possible ?
1. 2. 3. 4. 5
I1: IF ID EX WB WB
I2: IF ID EX WB
1 . Can we have 2 WB stages of each instruction simultaneously in the 5th cycle as both of them perform write operations on different registers ? Does it contain structural dependency in WB stage ?