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In the logic circuit shown below the redundant gate is _________??????

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The output F = xy'z + w'xz + w'yz

K-map of the above equation is

So output in minimized form will be F= xy'z + w'yz, which we can get from logic gate 1 and 3, so logic gate 2 is redundant here.

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Ans is 3 rd gate.

Becoz in 3 rd gate given ~wxz= for cannonical

          ~wxyz+ ~wx~yz

Similarly for gate 1 cannonical form is

wx~yz + ~wx~yz

And for gate 2

~wxyz + ~w~xyz

As you can see both the terms of 3rd gate can be derived using gate 1 and gate 2 so gate 3 is redundant here.

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