1 votes 1 votes for a synchronous sequential circuit shown below the output Z is zero for initial condition QA QB QC = QA' QB'QC'=000 the minimum number of clock cycle after which the output Z again become zero is________???? Digital Logic digital-logic sequential-circuit + – Hira Thakur asked Aug 12, 2017 • retagged Mar 14, 2019 by Naveen Kumar 3 Hira Thakur 1.1k views answer comment Share Follow See all 0 reply Please log in or register to add a comment.
0 votes 0 votes is it 6 cycles? arch answered Aug 12, 2017 arch comment Share Follow See 1 comment See all 1 1 comment reply Hira Thakur commented Aug 12, 2017 i edited by Hira Thakur Aug 12, 2017 reply Follow Share yes, it's correct. what is your approach?? 0 votes 0 votes Please log in or register to add a comment.