131 views
1 votes
1 votes
In a carry look ahead adder,the carry signals are generated in advance based on input signals,two four bit no. are to be added like

   A3 A2 A1 A0

+ B3 B2 B1 B0

......................................

all the no.s are available in the beginning,C0 is the initial carry and C4 is the carry from MSB i.e final carry.To calculate the final signal C4,how many gate levels are required?assume only basic gates are (AND ,OR,NOT)are available.

Please log in or register to answer this question.

Related questions

2 votes
2 votes
1 answer
1
Niharika 1 asked Jan 29, 2018
377 views
I am not getting anything from options .I am getiting answer as 0110011 .Can someone explain?/
0 votes
0 votes
0 answers
2
Niharika 1 asked Dec 3, 2017
199 views
0 votes
0 votes
0 answers
3
Niharika 1 asked Dec 3, 2017
302 views
0 votes
0 votes
1 answer
4
Sonu Kumar 1 asked Dec 1, 2017
394 views
The minimum no. of two input NAND gates required to implement the function F=(x'+y')(z+w) is: .....................??