0 votes 0 votes Without the TLB, in the paging every data/instruction access requires two memory accesses One for the page table and one for the data / instruction . Can any one explain it with diagram (if possible)? Operating System operating-system virtual-memory + – hem chandra joshi asked Sep 24, 2017 hem chandra joshi 390 views answer comment Share Follow See all 2 Comments See all 2 2 Comments reply Rupendra Choudhary commented Sep 24, 2017 reply Follow Share If page tables are stored in main memory then two memory references are required , one to access page table so that we OS can know the physical page mapping , then the actual page access where our data is stored in main memory... 0 votes 0 votes hem chandra joshi commented Sep 25, 2017 reply Follow Share k so you want to say 1st cycle : when the cpu match search in the page table then it get frame number that frame number go to the cpu 2nd cycle : and then it does physical mapping in physically memory rt? 0 votes 0 votes Please log in or register to add a comment.
0 votes 0 votes Without TLB two memory access is required if only 1 level of paging is used. Three memory access will be used if 2 level of paging is being used.... and so on. smelly indian answered Oct 2, 2017 smelly indian comment Share Follow See 1 comment See all 1 1 comment reply hem chandra joshi commented Oct 3, 2017 i edited by hem chandra joshi Oct 3, 2017 reply Follow Share plz point OUT THE CYCLE in your diagram . 0 votes 0 votes Please log in or register to add a comment.