Operand Addressing Mode |
Frequency |
No of Cycles |
register |
$10 \%$ |
$1$-reg reference ( $1$ cycle) |
immediate |
$20 \%$ |
no reference ($0$ cycle) |
direct |
$30 \%$ |
$1$-mem reference ($2$ Cycle) |
memory indirect |
$20 \%$ |
$2$-mem reference ( $4$ Cycle) |
indexed |
$20 \%$ |
$1$-reg reference and $1$-mem reference and $1$-arithmetic calculation ($6$ Cycle) |
In Indexed Addressing mode, if nothing specified then assume "Base Address is given directly into the instruction and Index value is stored into the Index Register".
Total average number of Cycle required to execute one instruction = $ 1 * 0.1 + 0 * 0.2 + 2 * 0.3 + 4 * 0.2 + 6 * 0.2 $
= $ 2.7 $ Cycles
Cycle time = $ \frac{1}{1 GHz} = 1 $ nano second.
Average time required to execute one instructions = $ 2.7 * 1 = 2.7 $ nano second.
$2.7 $ nano second required for = $1$ instruction
$1$ second required for = $ \frac{1}{2.7 * 10^{-9}} $ instructions
= $ 0.37037037037 * 10^{9} $ instructions
= $ 370.37 * 10^{6} $ instructions
= $370.37$ MIPS