2,166 views
1 votes
1 votes
During a program execution out of 1000 memory references there are 250 and 120 misses in L1 (Level1) and L2(Level2) caches respectively. Hit times for L1 and L2 cache are 24 and 40 cycles respectively. If there are 2.5 memory references per instruction, how many average stall cycles per instruction? (Assume L2 to memory miss penalty is 250 cycles)?

a)50

b)100

c)150

d)200

2 Answers

Best answer
4 votes
4 votes
Average stall/instr. = Misses in L1/instruction * Hit time of L2 + Misses in L2/instruction * Misspenalty in L2

  no of instruction = 1000/2.5 = 400.

so, Average stall/instruction = 250/400 * 40 + 120/400 * 250 = 100.

option B is answer.
selected by
0 votes
0 votes
Average Number of stalls per instruction = (# misses per instruction in L1 × Hit time in L2)
+ (# misses per instruction in L2 × Miss penalty of L2)
2.5 memory references per instruction ⇒ 10002.5 instructions for 1000 references = 400 instructions
∴ Average number of stalls per instruction
=(250400×40)+(120400×250)
= 25 + 75 = 100 cycles

Related questions

1 votes
1 votes
1 answer
1
kimaya asked Jul 8, 2017
643 views
The answer in the solution is b. My confusion is that adding word to a block will reduce Miss Rate and not Miss Penalty. So shouldn't the answer be c, i.e. only S2 is cor...
1 votes
1 votes
1 answer
2