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The data path shown in the figure computes the number of $1s$ in the $32-bit$ input word corresponding to an unsigned even integer stored in the shift register.
The unsigned counter, initially zero, is incremented if the most significant bit of the shift register is $1.$

GATE2006-IT_41

 

The microprogram for the control is shown in the table below with missing control words for microinstructions $I_1, I_2, \ldots I_n.$

$$\begin{array}{|l|c|c|c|} \hline \textbf {Microinstruction} &  \textbf{Reset_Counter}& \textbf{Shift_left} & \textbf{Load_output} \\\hline \text{BEGIN} & \text{1} & \text{0} & \text{0} \\\hline \text{I1}& \text{$?$} &  \text{$?$} &  \text{$?$}  \\\hline \text{:} & \text{:} & \text{:} & \text{:}  \\\hline  \text{In} &  \text{$?$}  &  \text{$?$}  &  \text{$?$}  \\\hline \text{END} & \text{0}  & \text{0} & \text{1} \\\hline \end{array}$$

The counter width (k), the number of missing microinstructions (n), and the control word for microinstructions $I_1, I_2, \ldots I_n$ are, respectively,

  1. $32, 5, 010$
  2. $5, 32, 010$
  3. $5, 31, 011$
  4. $5, 31, 010$
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3 Answers

Best answer
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41 votes

Answer $I_{1}$ to $I_{n}$ are microinstructions and reset_counter, shift_left and load_output are control signals to activate corresponding hardware(eg. Shift register or load output). 

Counter width $(k)$ is $5$ bits as shift register uses $32$ bit data Only.

The number of missing micro instructions $(n)$  should be $31$ as shift register contain Only unsigned EVEN integer. LSB Will be always $0$ so no need to shift for LSB.

 Control word contains:-

$1$ for active/enable.  $0$ for inactive or disabled.

Reset counter is to reset the counter so it must be $0$ for all microns.

Shift_left CS should be $1$ to shift the given data in shift reg. 

And load output has no meaning to make output active for all microinstructions as it will be used in the END only so it should be $0$.

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As there can be maximum 32 ones in number so 5 bit counter is sufficient no of micro instructions required would be 32 we have to load output at end so control word would be 0 1 0 for all micro instructions so ans is b
–2 votes
–2 votes
For 32 instructions counter require 5 bits and we require 31 shift left operation.
and the instruction word would be 011 because for load_output=1 the counter value would be stored into the output.
so option (c).
Answer:

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