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The storage area of a disk has the innermost diameter of $10$ cm and outermost diameter of $20$ cm. The maximum storage density of the disk is $1400$ bits/cm. The disk rotates at a speed of $4200$ RPM. The main memory of a computer has $64$-bit word length and $1$µs cycle time. If cycle stealing is used for data transfer from the disk, the percentage of memory cycles stolen for transferring one word is

  1. $0.5 \%$
  2. $1 \%$
  3. $5\%$
  4. $10\%$
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In a disk all tracks have equal capacity and so data density is highest for the innermost track as it has the smallest radius. 

  • Maximum storage density (hence of innermost track) $=1400$ bits per cm 
  • Track capacity $\pi \times d \times 1400$ bits $ = 3.14 \times 10 \times 1400 = 43960$ bits

With $4200$ rotations per minute, data transfer rate $=\dfrac{4200 \times 43960}{60}$ bits per second.

Therefore, to transfer $64$ bits  time required $ = \dfrac{60}{4200 \times 43960}\times 64 = 20.798\mu s$

With $1\mu s$ memory cycle time, the disk will take one memory cycle out of $21+1 = \dfrac{1}{21+1} \times 100 \approx 5\%$

(PS: If we consider just one word transfer we add the memory cycle time to the disk transfer time in the denominator but for continuous DMA transfer, this is not required as when data is transferred to main memory, disk can continue reading new data)

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60 votes
$y \;\mu$s is cycle time / transfer time (for memory)

$x \;\mu$s is data transfer time / preparation time (for disk)

$\%$ of time CPU is idle = $\frac{y}{x+y}$

Maximum bit identity is given, So consider inner most track to get the capacity

It is = $2 \times 3.14 \times 5 \times 1400$ bits $= 3.14 \times 14000$ bits

Rotational latency = $\frac{60}{4200} s = \frac{1}{70}s$

So, $3.14 \times 14000$ bits is read in $\frac{1}{70}s$

Therefore, to read $64$ bits time required = $\frac{{{10}^6} \times 64}{70 \times 3.14 \times 14000}\; \mu s = 20.8 \mu s$

As memory cycle time is $1 \mu s$

$64$ bits are transferred in $1 \mu s$

Therefore $\%$ CPU cycle stolen $= \frac{1}{20.8+1} = 4.58 \%  \approx 5\%$

Correct Answer: $C$
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37 votes

Track Capacity = density*parimeter
=1400 bits/cm*2*pi*5cm = 14000*pi bits = 43960 bits/track       $\because pi=3.14$

Track Capacity = 43960 bits/track

Transfer rate = 43960*70 = 30,77,200 bits/sec
 

Data needs to be transferred =8 Bytes or 64 bits,  cycle time= 1 microsec

 Time to transfer 64bits = $\frac{64}{30,77,200}$ = 20.8 microseconds or 21 memory cycles
For each 21 memory cycle, 1 memory cycle will be taken to transfer data. CPU can do its own work for 20 memory cycles and 1 memory cycle it will remain idle.
%of memory cycles stolen = $\frac{1*100}{21}$ = 4.76% or approx. 5%

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As the max density is given so we take the inner most diameter as it is denser there(2Rpi). The capacity of each track is pi*D*Density=3.14*10*1400 bits=14000pi bits
Now rotational latency is 60/RPM=60/4200=1/70 s.

So in 1/70 sec the disk can traverse one entire track and can read total 14000pi bits. Now this is done by the cpu. Now the data transfer is done by the DMA controller which will be operated in memory cycle time i.e 1 micro sec and it has 64 bit word length. So in 1 cycle it is able to transfer total of 64 bits. In 1 sec it can transfer 64*10^6 bits.(1sec memory cycle)
In 1 sec the disk can read total of 14000pi*70=3.08*10^6 bits (considering pi=22/7)
So total memory cycle stolen is 3.08*10^6/(64*10^6) %= 5%(approx)

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