8 votes 8 votes In a three stage counter, using $RS$ flip flops what will be the value of the counter after giving $9$ pulses to its input ? Assume that the value of counter before giving any pulses is $1$ : $1$ $2$ $9$ $10$ Digital Logic isro2013 digital-logic flip-flop + – makhdoom ghaya asked Apr 27, 2016 • edited Jun 7, 2020 by Sabiha banu makhdoom ghaya 5.9k views answer comment Share Follow See all 0 reply Please log in or register to add a comment.
Best answer 14 votes 14 votes 3 stage counter with RS FF is 3 bit counter, so after every 8 clock pulse, it will return to initial state. Initial state is 1, state after 8 clock pulse will be 1, So, after 9th clock pulse , state will be 2. Praveen Saini answered Apr 27, 2016 • selected Apr 27, 2016 by Arjun Praveen Saini comment Share Follow See all 7 Comments See all 7 7 Comments reply Show 4 previous comments Rahul Garg commented Sep 20, 2017 reply Follow Share M getting confused here, i read that we can have mod N or mod 2N synchronous counter or mod 2^N asynchronous conuter using n bits. 0 votes 0 votes David commented Apr 14, 2018 i edited by David Apr 15, 2018 reply Follow Share the counter can represent from 0 to 7 right .. ? because its 3 bit .. but since its starts with 1 , wont the states go like 1->2->3->4->5->6->7->1 (7 clock pulses) 0 votes 0 votes Praveen Saini commented May 3, 2018 reply Follow Share 1->2->3->4->5->6->7->0->1 1 votes 1 votes Please log in or register to add a comment.
0 votes 0 votes A three stage counter can count only to 8 (0-7) Initially, count = 1. After 9 clock pulses $1\rightarrow 2\rightarrow 3\rightarrow 4\rightarrow 5\rightarrow 6\rightarrow 7\rightarrow 0\rightarrow 1\rightarrow 2$ Answer is 2 JashanArora answered Dec 2, 2019 JashanArora comment Share Follow See 1 comment See all 1 1 comment reply DIBAKAR MAJEE commented Apr 18, 2020 reply Follow Share option B is correct 0 votes 0 votes Please log in or register to add a comment.
0 votes 0 votes Counter Type: A 3-stage counter using RS flip-flops is typically an asynchronous (ripple) counter. Initial State: The counter starts at 1, meaning its output is $001$ (assuming a binary output). Counting Pattern: With each clock pulse, the flip-flops toggle sequentially, creating a counting pattern: $001 -> 010 -> 100 -> 001 -> 010 -> ...$ 9 Pulses: After $8$ pulses, the counter will have completed two full cycles and returned to its initial state of $001$. The $9th$ pulse will toggle the first flip-flop, resulting in the output of $010$, which represents the value $2$. Therefore, the value of the counter after 9 pulses will be 2. rajveer43 answered Jan 12 rajveer43 comment Share Follow See all 0 reply Please log in or register to add a comment.