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Consider a small $2$-way set-associative cache memory, consisting of four blocks. For choosing the block to be replaced, use the least recently (LRU) scheme. The number of cache misses for the following sequence of block addresses is $8, 12, 0, 12, 8$

  1. $2$
  2. $3$
  3. $4$
  4. $5$
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We have 4 blocks and 2 blocks in a set . there are 2 sets.

 

since the lowest bit of block address is used for indexing into the set. 

So, 8, 12 and 0 first miss in cache with 0 replacing 8 and then 12 will be hit in cache and 8 again miss. So totally 4 misses. 

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