This question asks about the unconditional branches.
To deal with the branches , branch target buffer saves all the target addresses that can occur in a program for both conditional and as well as unconditional branches to save the time required to calculate the target address, otherwise ,it would create many stalls.
The fetch unit also has the ability to recognize branch instructions and to generate the target address. Thus, penalty produced by unconditional branches can be drastically reduced and the fetch unit computes the target address or refers the branch target buffer and continues to fetch instructions from that address, which are sent to the queue.
Thus, the rest of the pipeline gets a continuous stream of instructions, without stalling .
If the instruction is a conditional branch, the resolution of the branch decision occurs in the execution stage of the pipeline ,
which will create many stalls. If it is specified particularly that a particular stage computes target address, then from the next cycle we will fetch the target instruction , but if there is no information like this , we will consider that branch instruction completes execution, only then target instruction will be loaded.
For 1st part , as it is a unconditional branch, the pipeline gets a continuous stream of instructions, without stalling
so S1 occurs total 6 times , the answer will be D).
For 2nd part, the answer will be D).