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Consider a 32 bit microprocessor that has on chip 32 K byte 4 way set associative cache. Block size of cache is two 32 bit
words. The set number to which the word from memory location FAFEEBE1 wrapped?

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Let us first write the binary representation of the given memory address which is:

FAFEEBE1   =    1111 1010  1111  1110  1110  1011 1110  0001

Let us calculate no of lines first.

No of lines  =   Cache size / (Block size)

                 =   32 * 210 / 23

                      =    212 lines

Hence no of sets =  No of lines / no of ways for each line

                         =  210 lines

Hence no of bits required for set number  =   10

No of bits required for block offset  =  1  since in 1 block we have 2 words only each of size 32 bits = 4 B

We know the address format for set associative cache is :

Tag  ---    Set No  ----   Block offset

So since last bit in the address is meant for block offset , so 11th last bit  to 2nd last bits w.r.t  MSB(leftmost bit) are meant for set number.So we extract the given number of bits from the given address :

011  1110 000   =   0001 1111 0000 [Since 0's can be appended in left not right for number representation else value will change]

                       =    (1F0)16

                       =    496 in decimal

Hence set number corresponding to the given memory location should be 496(in decimal)

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