7,403 views
19 votes
19 votes

Choose the correct alternatives (More than one may be correct).

Two NAND gates having open collector outputs are tied together as shown in below figure.

The logic function $Y,$ implemented by the circuit is,

  1. $Y=ABC + DE$
  2. $Y=\overline{ABC + DE}$
  3. $Y=ABC.DE$
  4. $Y=\overline{ABC.DE}$

5 Answers

1 votes
1 votes
I think it is a or operation so A and b I think because  if we assume three wires are connected in y tri  joint now if any of the wire is having the current it will come to down wire also na sooo why and operation
Answer:

Related questions

10 votes
10 votes
1 answer
1
makhdoom ghaya asked Nov 23, 2016
5,702 views
State whether the following statements are TRUE or FALSE with reason:RAM is a combinational circuit and PLA is a sequential circuit.
34 votes
34 votes
1 answer
2
makhdoom ghaya asked Nov 18, 2016
6,541 views
Fill in the blanks:In the two bit full-adder/subtractor unit shown in below figure, when the switch is in position $2$ ___________ using _________ arithmetic.
12 votes
12 votes
4 answers
3
17 votes
17 votes
2 answers
4
makhdoom ghaya asked Nov 27, 2016
4,524 views
The condition for overflow in the addition of two $2's$ complement numbers in terms of the carry generated by the two most significant bits is ___________.