Made Easy Test Series cache Memory

Question

consider a 32 bit microprocessor which has 32K byte which is 4-way set associative cache.Block size of cache is 2 32-bit words.The set number to which wprd from memory location FAFEEBE1 wrapped ___.

I'm confused about 2 32-bit words as block size .Answer given was based on <Tag,Set,Word> =<19,9,4>

Answer 1

physical address

29

3

no of sets = n/ assocoativity 
        n= cache size/block size 
          =32Kbyte/2³

            =2¹⁵ / 2³ =2¹²

     no of sets = 2¹² /2²

                              = 2¹⁰ 

   set bits = 10 

19 TAG

10 set

3 block offset

1111 1010 1111 1110 1110 1011 1110 0001

blue color marked will give hexa decimal as : 0001 0111 1100

                                                                        : 17C (ANSWER)

Comments

I am also thinking the same but unable to verify this by any means. @focus _GATE sir, can you please verify this.

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let me try to clarify it to you.. we know memory is word addresable.. so if given microprocessor is 32 bit that means total 2^32 words are there... there is no point finding 1 byte in the memory.. if a word is greater than 1 byte..so we dont give significance to a byte here..because the least amount of memory that we can accees is the word ..so a block is also always represented as words..since there are only 2 words in a block you will only need 1 bit to identify them.. this is the basic logic that is very useful in all address to adress conversions

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Yes I am using the exact same logic. I also think that block offset should be 1 bit only. My doubt is “The accepted answer has taken 3 bits for block offset. Why?”