Memory refrences

Question

Comments

@rahul

I1 and I5 are indirect memory  addresse so 2 memory references are required.

I1 needs 2*4*4=32cycles and I5 also same as 32cycles.

I2,I3,I4 are direct address only 1-memory references.

I2=2*4=8

I3=1*2=2

I4=1*2=2

so total of 76 cycles and time=38 ns.

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How did you calculate for I1 and I5. 2 memory ref so 2×4=8, right

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for one memory 4cc and 2 memory=2*4=8.

to transfer one word  from memory to register it takes 8cc and total of 4 words=8*4=32cc

Answer 1

First of all in fetching the entire instruction , we need :

No of memory references  =  (4 + 2 + 1 + 1 + 4 + 1)

                                       =  13 

But each memory reference takes 4 cycles , so no of cycles = 13 * 4  =  52 

Now coming to memory reference in operand fetch and writeback , we have 3 such operands or result which are in direct addressing mode and 2 in indirect addressing mode..So 

No of references here  =  2*2 + 3  =  7

So no of cycles  =  7 * 4   =  28 cycles

So total cycles required for program execution = 52 + 28  =  80 cycles..

There is no ALU operations involved if u go by meaning of the instruction given in the question although ADD etc have been used..

So time taken   =   80 * 1 / (2 GHZ)

                       =   40 ns

Hence 40 ns should be the correct answer..So the options should be corrected..

Comments

@Habibkhan  SIR , Why aren't add and sub are ALU operations ? What is the reason for NOT considering it ? I didn;'t understand that . also in your solution you multiplied every instruction with memeory . I didn;t understand it also.. 

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That is what I said..U have not to use ur own meaning here but use the meaning of each instruction which is mentioned in the table..

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Ok. I underdtood that . @Habibkhan SIR , I have got one more doubt here... 

How 7 references ? 

2 indirect references means we need to refer memory 2 times .  1st time reference is already added in the cycles calculated ? So I think no need to multiply 2  

3 Direct Addressing this is actaully counted  in (13 cycles ) , right ? Why do we need to add them again ?

 

Answer 2

im getting 23 ns
2GHz =>   0.5 ns

I1 - Memory -4 * 4 * 0.5 ns = 8 ns
I2 - Memory-2 * 4 * 0.5 ns = 4 ns
I3 -    ALU   -1 * 2 * 0.5 ns = 1 ns
I4 -    ALU   -1 * 2 * 0.5 ns = 1 ns
I5 - Memory-4 * 4 * 0.5 ns = 8 ns
I6 -    ALU   -1 * 2 * 0.5 ns = 1 ns

Comments

But I1 should have 6 memory refrences 4 for instruction fetch and 2 more for indirect addressed operand. In same way i am getting 96 cycles