Cache Memory

Question

Given the following benchmark code, and assume that all variables except array locations resides in registers, a double variable occupies 8 bytes and the array A, B and C are placed consecutively in memory, answer the following questions

double A[1024], B[1024], [1024];

for (int i=0; i< 1000; i += 2){

A[i]=35.0 * B[i] + C[i+1];

}

 

Assume a virtually addressed two-way set associative cache of capacity 8 KB and 64 byte blocks, compute the overall miss rate.

Comments

Hey, don't you think A[I],B[I] & C[I] map into same set results into serial miss. There are 2 blocks in a set.

1st miss -block for a[i] in the set 0.

2nd miss - block for B[I] in the set 0.

3rd miss - block for c[I] in the set 0 overwriting a[I] block. This happens Everytime results into 100% page fault.

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^yes.. you seems correct ..but we have two blocks per set ..right ?? so we can place 2nd array into another set..I mean.. B[i] ->  set 0 and C[i+1] -> set 1..??

@Kapil, @Arjun sir ,please help here ??

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I think C[I] & C[I+1] are in same block & the address of the block is such that it maps to the set 0.