Search results for machine-instructions / GATE Overflow for GATE CSE

3 votes

1 answer

1

How carry and zero flag bits are modified after CMP instruction is executed?
The instruction format is CMP R1, R2. How will the carry and zero flags we be modified after above instruction is executed? Case 1: R1< R2 Carry Flag = 1 Zero Flag = 0 R1= R2 Carry Flag = 0 Zero Flag = 1 R1> R2 ... 0 Zero Flag = 1 R1> R2 Carry Flag = 1 Zero Flag = 0 Which one of the above two cases is correct?

The instruction format is CMP R1, R2.How will the carry and zero flags we be modified after above instruction is executed? Case 1:R1< R2 Carry Flag = 1 Zero Flag = 0R1= R...

jaswanth431

2.2k views

jaswanth431 asked Sep 5, 2021

1 votes

1 answer

2

made easy test series
What should I assume as the size of HALT instruction ? HALT instruction comes under which type of instruction

What should I assume as the size of HALT instruction ? HALT instruction comes under which type of instruction

amitqy

1.5k views

amitqy asked Nov 15, 2018

5 votes

3 answers

3

Implementation of BSA(Branch and save address) instruction
I have a doubt regarding the implementation of BSA instruction. I read that BSA instruction can be implemented as :- T4:- m[AR] <-- PC; AR<--AR+1 T5:- PC<--AR; SC<--0 Here T4 and T5 are 4th and ... to the position where PC is written. So they should happen at different clock cycles right so that they can execute in proper order?

I have a doubt regarding the implementation of BSA instruction. I read that BSA instruction can be implemented as :-T4:- m[AR] < PC; AR< AR+1T5:- PC< AR; SC< 0He...

Xylene

3.1k views

Xylene asked Jun 6, 2017

tags	tag:apple
author	user:martin
title	title:apple
content	content:apple
exclude	-tag:apple
force match	+apple
views	views:100
score	score:10
answers	answers:2
is accepted	isaccepted:true
is closed	isclosed:true