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Recent questions tagged isro2016-ece

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1
ISRO 2016-EC Combinational circuit
Given circuit represents (a) INVERTER (b) AND (c) OR (d) NOR
Given circuit represents(a) INVERTER(b) AND(c) OR(d) NOR
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3 votes
1 answer
2
ISRO2016- EC Calculus
Evaluate $\int_0^1 \int_0^{\sqrt{1+x^2}} \frac{d x \cdot d y}{\left(1+x^2+y^2\right)}$ $\frac{\pi}{2}[\log (1+\sqrt{2})]$ $\frac{\pi}{4}[\log (1+\sqrt{2})]$ $\frac{\pi}{2}[\log (1-\sqrt{2})]$ $\frac{\pi}{4}[\log (1-\sqrt{2})]$
Evaluate $\int_0^1 \int_0^{\sqrt{1+x^2}} \frac{d x \cdot d y}{\left(1+x^2+y^2\right)}$$\frac{\pi}{2}[\log (1+\sqrt{2})]$$\frac{\pi}{4}[\log (1+\sqrt{2})]$$\frac{\pi}{2}[\...
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4
ISRO2016-EC Mathematics
The value of $\lim _{x \rightarrow 8}\left(\frac{x^{1 / 3}-2}{x-8}\right)$ is $1/4$ $1/8$ $1/12$ $1/16$
The value of $\lim _{x \rightarrow 8}\left(\frac{x^{1 / 3}-2}{x-8}\right)$ is$1/4$$1/8$$1/12$$1/16$
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5
ISRO2016-EC combinational logic
in given combinational logic $X=?$ $X = AB'C' +A'BC'+ A'B'C+ ABC$ $X = A'BC +A'BC'+ AB'C+ A'B'C'$ $X = AB + BC + AC$ $X= A'B'+B'C'+A'C'$
in given combinational logic $X=?$$X = AB'C' +A'BC'+ A'B'C+ ABC$$X = A'BC +A'BC'+ AB'C+ A'B'C'$$X = AB + BC + AC$$X= A'B'+B'C'+A'C'$
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6
ISRO2016 -EC Digital Logic
$000, 001, 010, 011, 100\; \&$ repeats $100, 011, 010, 001, 000\; \&$ repeat $010, 011, 100, 000, 001\; \&$ repeats $101, 110, 111, 000, 001, 010, 011, 100 \;\&$ repeats
$000, 001, 010, 011, 100\; \&$ repeats$100, 011, 010, 001, 000\; \&$ repeat$010, 011, 100, 000, 001\; \&$ repeats$101, 110, 111, 000, 001, 010, 011, 100 \;\&$ repeats
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1 votes
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7
ISRO2016-ECE Digital Logic
Simplify Boolean function represented in sum of product of min-terms, $\text{F}(x, y, z)= \Sigma(0, 2, 4,5, 6)$ $z' + xy'$ $x' y'z' + xyz+ xy'z'$ $xyz + x' + y' + z'$ $xy+yz+zx$
Simplify Boolean function represented in sum of product of min-terms, $\text{F}(x, y, z)= \Sigma(0, 2, 4,5, 6)$ $z' + xy'$$x' y'z' + xyz+ xy'z'$$xyz + x' + y' + z'$$xy+yz...
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8
ISRO2016-ECE Digital logic
How is the status of the carry, auxiliary carry and parity flag affected if write instruction? MOV A,#9C ADD A,#64H $\text{CY = 0, AC = 0, P = 0}$ $\text{CY = 1, AC = 1, P = 0}$ $\text{CY = 0, AC = 1, P = 0}$ $\text{CY = 1, AC = 1, P = 1}$
How is the status of the carry, auxiliary carry and parity flag affected if write instruction?MOV A,#9C ADD A,#64H$\text{CY = 0, AC = 0, P = 0}$$\text{CY = 1, AC = 1, P =...
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2 answers
9
ISRO2016-ECE Networks
A typical optical fiber has high refractive index core & low refractive index cladding Low refractive index core & high refractive index cladding Uniform refractive index core surrounded by variable refractive index cladding None of the above
A typical optical fiber hashigh refractive index core & low refractive index claddingLow refractive index core & high refractive index claddingUniform refractive index co...
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1 votes
1 answer
10
ISRO2016-ECE Networks
Hamming codes are used for Burst error correction Signal error correction Both (a) and (b) None of the above
Hamming codes are used forBurst error correctionSignal error correctionBoth (a) and (b)None of the above
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1 votes
1 answer
11
ISRO2016-ECE Networks
An FM signal at $10.7$ MHz IF needs to be digitized for demodulation in a digital domain. If the bandwidth of this signal is $200$ kHz, the maximum usable sampling frequency is $200$ kHz $600$ kHz $400$ kHz $800$ kHz
An FM signal at $10.7$ MHz IF needs to be digitized for demodulation in a digital domain. If the bandwidth of this signal is $200$ kHz, the maximum usable sampling freque...
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2 votes
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12
ISRO2016-ECE Digital Logic
For a $10$-bit digital ramp ADC using $500\;\text{kHz}$ clock, the maximum conversion time is $2048\; \mu \;\text{S}$ $2046\; \mu \;\text{S}$ $2064\; \mu \;\text{S}$ $2084\; \mu \;\text{S}$
For a $10$-bit digital ramp ADC using $500\;\text{kHz}$ clock, the maximum conversion time is$2048\; \mu \;\text{S}$$2046\; \mu \;\text{S}$$2064\; \mu \;\text{S}$$2084\; ...
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13
ISRO2016-ECE Digital Logic
A $10$-bit DAC has a step size of $\text{10mV}.$ What is its Full scale O/P voltage and the percentage resolution? $10.24\text{V}, 0.2\%$ $10.23\text{V}, 0.5\%$ $10.23\text{V}, 0.1\%$ $10.24\text{V}, 0.1\%$
A $10$-bit DAC has a step size of $\text{10mV}.$What is its Full scale O/P voltage and the percentage resolution?$10.24\text{V}, 0.2\%$$10.23\text{V}, 0.5\%$$10.23\text{V...
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1 votes
2 answers
14
ISRO2016-ECE Digital logic
Which shift register counter requires the most decoding circuitry? Johnson Counter Ring Counter Ripple Counter $\text{MOD}$ counter
Which shift register counter requires the most decoding circuitry?Johnson CounterRing CounterRipple Counter$\text{MOD}$ counter
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15
ISRO2016-ECE Digital Logic
How many inputs & outputs does a full adder have? $3, 2$ $2, 3$ $3, 3$ $2, 2$
How many inputs & outputs does a full adder have?$3, 2$$2, 3$$3, 3$$2, 2$
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16
ISRO 2016-ECE Digital Logic
A 1 MHz clock signal is applied to a J-K Flip Flop with J=K=1. What is the frequency of the Flip-Flop 0/P signal? (a) 2 MHz (b) 500 kHz (c) 250 kHz (d) 500 MHz
A 1 MHz clock signal is applied to a J-K Flip Flop with J=K=1. What is the frequency of the Flip-Flop 0/P signal? (a) 2 MHz (b) 500 kHz (c) 250 kHz (d) 500 MHz
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