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Answers by Prashant.
4
votes
81
Calicut Gate Academy Test Series | TOC Q32
Let ⟨M⟩ be the encoding of a Turing machine as a string over Σ={0,1} Let L={⟨M⟩∣M is a Turing machine that accepts a string of length 2014}. Then L is Recursively enumerable Not Recursively enumerable Recursive Udecidable (Multiple Options May be Correct . Mark them All )
Let ⟨M⟩ be the encoding of a Turing machine as a string over Σ={0,1} Let L={⟨M⟩∣M is a Turing machine that accepts a string of length 2014}.Then L isRecursivel...
592
views
answered
Dec 5, 2016
Theory of Computation
test-series
gate-academy-test-series
theory-of-computation
turing-machine
+
–
3
votes
82
cormen chapter 23 third edition.
Given a graph G and a minimum spanning tree T, suppose that we decrease the weight of one of the edges in T. Show that T is still a minimum spanning tree for G. More formally, let T be a minimum spanning tree for G with edge weights given by weight function w. ... k, if (u, v) = (x, y). Show that T is a minimum spanning tree for G with edge weights given by w'
Given a graph G and a minimum spanning tree T, suppose that we decrease the weight of one of the edges in T. Show that T is still a minimum spanning tree for G. More form...
1.6k
views
answered
Dec 1, 2016
Algorithms
graph-algorithms
minimum-spanning-tree
cormen
+
–
2
votes
83
Test by Bikram | Digital Logic | Test 2 | Question: 18
How many flip flops are required to construct a decade counter? $10$ $3$ $4$ $2$
How many flip flops are required to construct a decade counter?$10$$3$$4$$2$
343
views
answered
Dec 1, 2016
Digital Logic
tbb-digital-logic-2
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–
4
votes
84
Test by Bikram | Digital Logic | Test 2 | Question: 8
Shifting a register content to left by one bit position is equivalent to: Division by two. Addition by two. Multiplication by two. Subtraction by two.
Shifting a register content to left by one bit position is equivalent to:Division by two.Addition by two.Multiplication by two.Subtraction by two.
243
views
answered
Dec 1, 2016
Digital Logic
tbb-digital-logic-2
+
–
6
votes
85
Test by Bikram | Digital Logic | Test 2 | Question: 30
The excess $3$ code of decimal number $26$ is: $0100 1001$ $01011001$ $1000 1001$ $01001101$
The excess $3$ code of decimal number $26$ is:$0100 1001$$01011001$$1000 1001$$01001101$
970
views
answered
Dec 1, 2016
Digital Logic
tbb-digital-logic-2
+
–
2
votes
86
Test by Bikram | Digital Logic | Test 2 | Question: 19
How many select lines will a $32:1$ multiplexer have? $5$ $8$ $9$ $11$
How many select lines will a $32:1$ multiplexer have?$5$$8$$9$$11$
198
views
answered
Dec 1, 2016
Digital Logic
tbb-digital-logic-2
+
–
3
votes
87
Test by Bikram | Digital Logic | Test 2 | Question: 15
The number of control lines for $16$ to $1$ multiplexer is ___. $2$ $4$ $3$ $5$
The number of control lines for $16$ to $1$ multiplexer is ___.$2$$4$$3$$5$
186
views
answered
Dec 1, 2016
Digital Logic
tbb-digital-logic-2
+
–
2
votes
88
Test by Bikram | Digital Logic | Test 2 | Question: 13
Which of the following combinations is sufficient to build a half adder? EX-OR gate and NOR gate. EX-OR gate and OR gate. EX-OR gate and AND gate. Four NAND gates.
Which of the following combinations is sufficient to build a half adder?EX-OR gate and NOR gate.EX-OR gate and OR gate.EX-OR gate and AND gate.Four NAND gates.
224
views
answered
Dec 1, 2016
Digital Logic
tbb-digital-logic-2
adder
+
–
5
votes
89
Test by Bikram | Digital Logic | Test 2 | Question: 10
How many minimum number of two input AND gates and two input OR gates are required to realize $Y = BD+CE+AB$ ? $2, 2$ $4, 2$ $3, 2$ $2, 3$
How many minimum number of two input AND gates and two input OR gates are required to realize $Y = BD+CE+AB$ ?$2, 2$$4, 2$$3, 2$$2, 3$
1.2k
views
answered
Dec 1, 2016
Digital Logic
tbb-digital-logic-2
+
–
2
votes
90
Test by Bikram | Digital Logic | Test 2 | Question: 23
Convert decimal $153$ to octal. Which of the following will be the equivalent in octal? $( 231)_8$ $( 331)_8$ $( 431)_8$ none of these
Convert decimal $153$ to octal. Which of the following will be the equivalent in octal?$( 231)_8$$( 331)_8$$( 431)_8$none of these
221
views
answered
Dec 1, 2016
Digital Logic
tbb-digital-logic-2
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–
4
votes
91
Pointers
2.5k
views
answered
Dec 1, 2016
Programming in C
pointers
programming-in-c
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–
16
votes
92
DMA transfer rate
An 8-bit DMA device is operating is cycle stealing mode (single transfer mode). Each DMA cycle is of 6 clock states and DMA clock is 2MHz. Intermediate CPU machine cycle takes 2 microsecond, determine the DMA data transfer rate.
An 8-bit DMA device is operating is cycle stealing mode (single transfer mode). Each DMA cycle is of 6 clock states and DMA clock is 2MHz. Intermediate CPU machine cycle ...
5.3k
views
answered
Nov 28, 2016
CO and Architecture
co-and-architecture
dma
+
–
2
votes
93
Imp doubt
416
views
answered
Nov 28, 2016
Algorithms
algorithms
time-complexity
testbook-test-series
+
–
2
votes
94
DMA madeeasy
Here device transfer rate is 416.7 us and cpu executing an instruction in .5 us. So how to decide the clock cycle time, to calculate the fraction of cpu slows down?
Here device transfer rate is 416.7 us and cpu executing an instruction in .5 us.So how to decide the clock cycle time, to calculate the fraction of cpu slows down?
1.2k
views
answered
Nov 28, 2016
Operating System
dma
co-and-architecture
+
–
10
votes
95
level cache
Suppose that a CPU has access to 3 levels of memory. L1 = 2000 words and access time = 0.02 ms and H1 = 0.65 L2 = 10000 words and access time = 0.2 ms and H2 = 0.45 L3 = 20000 words and access time = 2 ms Assume that if a Word to be accessed is ... accessed directly. If it is in L2, first transfer it to L1 and then send to CPU. Similarly, for L3 . What is the average access time in % ?
Suppose that a CPU has access to 3 levels of memory. L1 = 2000 words and access time = 0.02 ms and H1 = 0.65L2 = 10000 words and access time = 0.2 ms and H2 = 0.45L3 = 20...
4.2k
views
answered
Nov 28, 2016
Operating System
cache-memory
co-and-architecture
+
–
3
votes
96
dma,harddisk
Consider a hard disk which when requested to read a sector of 2048 bytes, first reads into its own local memory, and then uses DMA to transfer it to the main memory over a bus. The latency of access of both memories is 80ns each. The bus is clocked ... to complete the transfer? All possible pipelining between stages is implemented. (A) 10250ns (B) 10330ns (C) 10360ns (D) None of these
Consider a hard disk which when requested to read a sector of 2048 bytes, first reads into its own local memory, and then uses DMA to transfer it to the main memory over ...
748
views
answered
Nov 27, 2016
2
votes
97
question bank
Consider the following statements: S1: Infinite union of regular languages can be context-free. S2: Language obtained after applying Kleen closure on a regular language will always be regular and infinite. Which of the above statement is true?
Consider the following statements:S1: Infinite union of regular languages can be context-free.S2: Language obtained after applying Kleen closure on a regular language wil...
913
views
answered
Nov 27, 2016
2
votes
98
Eigen Vector
The number of linearly independent eigen vector of matrix A(3$\times$3) given as following a11=a22=2, a12=1, a13=a21=a23=a31=a32=0, a33=3
The number of linearly independent eigen vector of matrix A(3$\times$3) given as following a11=a22=2, a12=1, a13=a21=a23=a31=a32=0, a33=3
456
views
answered
Nov 27, 2016
31
votes
99
GATE CSE 2007 | Question: 5
Consider the DAG with $V = \{1,2,3,4,5,6\}$ shown below. Which of the following is not a topological ordering? $1$ $2$ $3$ $4$ $5$ $6$ $1$ $3$ $2$ $4$ $5$ $6$ $1$ $3$ $2$ $4$ $6$ $5$ $3$ $2$ $4$ $1$ $6$ $5$
Consider the DAG with $V = \{1,2,3,4,5,6\}$ shown below.Which of the following is not a topological ordering?$1$ $2$ $3$ $4$ $5$ $6$$1$ $3$ $2$ $4$ $5$ $6$$1$ $3$ $2$ $4$...
7.9k
views
answered
Nov 27, 2016
Algorithms
gatecse-2007
algorithms
graph-algorithms
topological-sort
easy
+
–
7
votes
100
GATE CSE 1989 | Question: 3-v
Which of the following well-formed formulas are equivalent? $P \rightarrow Q$ $\neg Q \rightarrow \neg P$ $\neg P \vee Q$ $\neg Q \rightarrow P$
Which of the following well-formed formulas are equivalent?$P \rightarrow Q$$\neg Q \rightarrow \neg P$$\neg P \vee Q$$\neg Q \rightarrow P$
3.7k
views
answered
Nov 27, 2016
Mathematical Logic
gate1989
normal
mathematical-logic
propositional-logic
multiple-selects
+
–
32
votes
101
GATE CSE 1989 | Question: 3-iii
Which of the following problems are undecidable? Membership problem in context-free languages. Whether a given context-free language is regular. Whether a finite state automation halts on all inputs. Membership problem for type $0$ languages.
Which of the following problems are undecidable?Membership problem in context-free languages.Whether a given context-free language is regular.Whether a finite state autom...
10.1k
views
answered
Nov 27, 2016
Theory of Computation
gate1989
normal
theory-of-computation
decidability
multiple-selects
+
–
38
votes
102
GATE CSE 1989 | Question: 3-ii
Context-free languages and regular languages are both closed under the operation (s) of : Union Intersection Concatenation Complementation
Context-free languages and regular languages are both closed under the operation (s) of :UnionIntersectionConcatenationComplementation
11.9k
views
answered
Nov 27, 2016
Theory of Computation
gate1989
easy
theory-of-computation
closure-property
multiple-selects
+
–
4
votes
103
Find output
568
views
answered
Nov 27, 2016
Programming in C
programming-in-c
+
–
39
votes
104
GATE CSE 1989 | Question: 2-ii
Match the pairs in the following questions: ...
Match the pairs in the following questions:$$\begin{array}{ll|ll}\hline \text{(A)} & \text{Base addressing} & \text{(p)} & \text{Reentranecy} \\\hline \text{(B)} & \text...
5.9k
views
answered
Nov 27, 2016
CO and Architecture
gate1989
match-the-following
co-and-architecture
addressing-modes
easy
+
–
27
votes
105
GATE CSE 1989 | Question: 2-iv
Match the pairs in the following: ...
Match the pairs in the following:$$\begin{array}{ll|ll}\hline \text{(A)} & \text{Virtual memory} & \text{(p)} & \text{ Temporal Locality} \\\hline \text{(B)} & \text{Sha...
12.9k
views
answered
Nov 27, 2016
Operating System
match-the-following
gate1989
operating-system
virtual-memory
+
–
7
votes
106
GATE CSE 1989 | Question: 2-iii
Match the pairs in the following: ... 2)$} &\text{(s)} & \text{Selection of the $k^{th}$ smallest element in a set of $n$ elements} \\\hline \end{array}$
Match the pairs in the following:$$\begin{array}{ll|ll}\hline \text{(A)} & \text{$O (\log n)$} & \text{(p)} & \text{Heapsort} \\\hline \text{(B)} & \text{$O (n)$} & \tex...
5.4k
views
answered
Nov 27, 2016
Algorithms
gate1989
match-the-following
algorithms
time-complexity
+
–
24
votes
107
GATE CSE 1990 | Question: 1-viii
The condition for overflow in the addition of two $2's$ complement numbers in terms of the carry generated by the two most significant bits is ___________.
The condition for overflow in the addition of two $2's$ complement numbers in terms of the carry generated by the two most significant bits is ___________.
4.5k
views
answered
Nov 27, 2016
Digital Logic
gate1990
digital-logic
number-representation
fill-in-the-blanks
+
–
15
votes
108
GATE CSE 1989 | Question: 1-iv
The transitive closure of the relation $\left\{(1, 2), (2, 3), (3, 4), (5, 4)\right\}$ on the set $\left\{1, 2, 3, 4, 5\right\}$ is ___________.
The transitive closure of the relation $\left\{(1, 2), (2, 3), (3, 4), (5, 4)\right\}$ on the set $\left\{1, 2, 3, 4, 5\right\}$ is ___________.
7.1k
views
answered
Nov 27, 2016
Set Theory & Algebra
gate1989
set-theory&algebra
relations
descriptive
+
–
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