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1
Lost Update problem
IN these questions , in T1 it will read value of A from hard disk or local buffer and W(A) when execute it will make change in local buffer or hard disk , are w(A) and commit are same because commit means we stored data in hard disk anyone explain plz in detail
answered
2 days
ago
in
Databases

34
views
databases
selfdoubt
0
votes
2
Multi level paging
Im confused with multi level paging As per my understanding the outer most page table must be in main memory and not all inner page tables to be in memory in 2 level paging by this we can save the memory But with this, faults ... more levels of paging more faults wil be their Even then why we are using multi level paging Please can someone help me
answered
3 days
ago
in
Operating System

32
views
memorymanagement
+2
votes
3
Please solve this Q
Q. The best case of quick sort helps Aditya to sort a particular data set of size ‘n’ in 640 ms. Suresh also tried the same algorithm on similar data set and it took him 256 ms in best case to sort a file of size 16. What could be Aditya’s file size?
answered
3 days
ago
in
Algorithms

28
views
algorithms
+1
vote
4
Optimal Merge Pattern,similar to http://gateoverflow.in/1997/gate2014238
answered
4 days
ago
in
Algorithms

33
views
optimalmergepattern
0
votes
5
the gate book
The no. of binary trees with 3 nodes which when traversed by postorder gives the sequence A, B, C is: (a) 3 (b) 9 (c) 7 (d) 5
answered
5 days
ago
in
DS

16
views
binarytree
0
votes
6
number of comparison
how many comparison are needed to locate the maximum and minimum in a sequence with 128 elements?
answered
5 days
ago
in
Mathematical Logic

19
views
0
votes
7
Relation doubt
What is the total number of asymmetric and transitive relation from set a to itself which has n element ?
answered
6 days
ago
in
Mathematical Logic

20
views
0
votes
8
GATE201429
A 4way setassociative cache memory unit with a capacity of 16 KB is built using a block size of 8 words. The word length is 32 bits. The size of the physical address space is 4 GB. The number of bits for the TAG field is ____
answered
6 days
ago
in
CO & Architecture

1.8k
views
gate20142
co&architecture
cachememory
numericalanswers
normal
0
votes
9
Paging
Suppose you have a computer system with a 48bit logical address, page size of 16KB and 4 bytes per page table entry. If we have a 48MB program such that the entire program and all necessary page tables are in memory. Assume that each page ... this 48Mb process the solution splits the logical address space of 48 bits into parts ?? how do we decide that split ???
answered
6 days
ago
in
Operating System

60
views
multilevelpaging
+1
vote
10
Optimal Merging .
The optimal time required in merging the list of size 11, 21, 33, 34,45,54,60 where merging of 2 lists takes O(m+n) time is I think the answer should be 692. But the answer given is 258.
answered
6 days
ago
in
Algorithms

65
views
algorithms
arrays
0
votes
11
The minimum number of comparisons required
answered
Aug 15
in
Algorithms

22
views
+1
vote
12
Cache Memory
Consider a 256KB direct mapped byte addressable cache. If one word is 4 bytes and each cache block contains 16 words , then determine the number of bits required for tag.(Assume that physical address of computer is 32 bits)
answered
Aug 15
in
CO & Architecture

74
views
0
votes
13
Real World Example of Paging
Processor: 32 bit with 4 KB page size. RAM:  4 GB with 220 frames in the RAM. Process: > Process Name  MOTO GP > Process Size  1GB > Frame Size  4 KB // As frame size is always equal to page size. ... processes like NFS Shift 2 which is approx of 7 GB, I think which introduces the concept of virtual memory but don't know how?
answered
Aug 14
in
Operating System

26
views
operatingsystem
paging
multilevelpaging
+1
vote
14
TOC Question
Whats The Answer & How to solve such kind of Questions ?
answered
Aug 12
in
Theory of Computation

43
views
theoryofcomputation
contextfreelanguage
+3
votes
15
cache
Consider a system with the main memory access time as 200 ns and cache access time as 10 ns. Hit ratio for read request is 0.8 and 80% of the memory requests are for read. If write through policy is used, then the average time considering both read and write requests is _______. a. 169.6 ns b. 192.4 ns c. 78.4 ns d. None of these
answered
Aug 12
in
CO & Architecture

51
views
+2
votes
16
cache
Suppose that in 1000 memory references there are 150 misses in first level and 100 miss in second level cache. Assume that miss penalty from L2 cache to memory is 120 cycles. The hit time of L2 cache is 50 cycles. If there are 4 memory references per instruction, the average stall per instruction is _________. (ans given:78 )
answered
Aug 12
in
CO & Architecture

25
views
+1
vote
17
#Disk
Consider a disk with seek time of 4 ms, rotation speed of 15,000 rpm and 512byte sectors with 500 sectors per track. Suppose that we wish to read a file consistinh of 2500 sectors for a total of 1.28 Mbytes. We would like to estimate the total time for the transfer?
answered
Aug 12
in
Operating System

33
views
+1
vote
18
BCNF3NF
Consider the following statements. If relation R is in 3NF and every key is simple, then R is in BCNF If relation R is in 3NF and R has only one key, then R is in BCNF Both 1 and 2 are true 1 is true but 2 is false 1 is false and 2 is true Both 1 and 2 are false
answered
Aug 11
in
Databases

87
views
0
votes
19
array
answered
Aug 11
in
Programming

52
views
arrays
datastructure
programminginc
+2
votes
20
IEEE floating point
in IEEE floating point representation, all the exponent bits are one and mantissa bits are non zero. this represent A) 0 B) infinity C) denormalized value D) error
answered
Aug 11
in
CO & Architecture

33
views
0
votes
21
graph theory
For complete bipartite graph k2,3 , what is the edge connectivity ?
answered
Aug 11
in
Graph Theory

39
views
0
votes
22
Matrices
If A is a non singular matrix and $\left (I  A + A^{2}  ..... + (1)^{n}A^{n}\right ) =0$) Then $A^{1}$ is
answered
Aug 10
in
Linear Algebra

74
views
engineeringmathematics
linearalgebra
matrices
+1
vote
23
GATE200464
Consider the following program segment for a hypothetical CPU having three user registers R1, R2 and R3. Instruction Operation Instruction Size (in words) MOV R1, 5000 R1 $\leftarrow$ Memory[5000] 2 MOV R2(R1) R2 $\leftarrow$ Memory[(R1)] 1 ... decode : 2 clock cycles per word The total number of clock cycles required to execute the program is 29 24 23 20
answered
Aug 9
in
CO & Architecture

1.2k
views
gate2004
co&architecture
machineinstructions
normal
0
votes
24
writing reccurrence equation
linear search recursive program int recSearch(int arr[], int l, int r, int x) { if (r < l) return 1; if (arr[l] == x) return l; return recSearch(arr, l+1, r, x); } how will you write reccurrence equation to find time complexity of it
answered
Aug 9
in
Programming

43
views
+1
vote
25
please solve this Q
Q . The maximum number of edges in an undirected graph (simple) with 52 vertices and 3 components are
answered
Aug 8
in
Graph Theory

49
views
graphtheory
0
votes
26
how to start preparation from scratch ? should i purchase handwritten notes from "prakashbookdepot.com" ?
answered
Aug 8
in
Study Resources

34
views
0
votes
27
Conflict misses doubt.
I read that if block size increases, then we have fewer blocks so number of conflict misses increases. My doubt is how will the conflict misses increase ? If cache size is constant, then by increasing block size we have fewer ... would be mapped to each line of cache would be same and hence number of conflict misses should remain same right?
answered
Aug 8
in
CO & Architecture

21
views
misses
co&architecture
directmapping
+3
votes
28
Relations
Consider the set {2,3,4} and define partial ordering if a divides b. Now element 3 is maximal or minimal.
answered
Aug 8
in
Set Theory & Algebra

27
views
relations
settheory&algebra
+1
vote
29
digital logic
what is booth recoded multiplier value for this binary number ? 001110
answered
Aug 8
in
Digital Logic

59
views
digitallogic
selfdoubt
+1
vote
30
Word or byte
Let the number of bits required to address a memory word be 25. Each word is of 16 bits. Number of words in the memory is ________. Number of bytes in the memory denoted as ____________ Number of bits to address __________. Where W denotes word and B denotes bytes.
answered
Aug 7
in
Operating System

151
views
operatingsystem
+2
votes
31
Please the question only .
A machine has a 32bit architecture, with 1word long instructions. It has 64 registers, each of which is 32 bits long. It needs to support 45 instructions, which have an immediate operand in addition to two register operands. ... in addition to two register operands?? Note: I know this is previous year gate questions . Don't close it.
answered
Aug 7
in
CO & Architecture

25
views
co&architecture
0
votes
32
Self_doubt
What is the upper bound of n! Please provide a logical deduction to prove that its $n^{n}$.
answered
Aug 7
in
Algorithms

16
views
0
votes
33
disk and address
A hard disk has 64 sectors/ track, 16 platters, each with 2 regarding surface and 2000 cylinders. The address of a sector is given as <c, h, s> where c → cylinder no., h → surface no., s → sector no. 0th sector is addressed as <0, 0, 0>. The address <500, 20, 32> corresponds to sector number is ??
answered
Aug 7
in
CO & Architecture

23
views
disks
co&architecture
+1
vote
34
Trees
What is the total no. Of binary tree possible with n nodes? How one can calculate?
answered
Aug 6
in
DS

24
views
+1
vote
35
Related to page frame
n a 32 bit processor the virtual address is 22 bit:12 bit(Table index : Offset). What is the size of the page frame and the process page table assuming that each entry in the page table is 4 Bytes?
answered
Aug 6
in
Operating System

98
views
operatingsystem
pagetable
memorymanagement
discretemathematics
programminginc
+1
vote
36
Morris Mano exercise
Convert into ASCII code. a)8723
answered
Aug 4
in
Digital Logic

29
views
+1
vote
37
self doubt
the least no that must be subtracted from 1294 so that the remainder when divided by 9 ,11, 13 will leave in each case the same remainder
answered
Aug 3
in
Numerical Ability

35
views
0
votes
38
eigen value
answered
Aug 3
in
Mathematical Logic

31
views
eigenvalue
linearalgebra
engineeringmathematics
+2
votes
39
malloc
why we use malloc to create link list ?
answered
Aug 2
in
Programming

39
views
0
votes
40
How to find this coefficient in this question?
answered
Aug 1
in
Combinatory

46
views
permutationsandcombinations
generatingfunctions
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