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2
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1
Test by Bikram | Mock GATE | Test 1 | Question: 39
Consider the following matrix: $\left [ A \right ]=$ $\begin{bmatrix} 1.5&0 &1 \\ -0.5 & 0.5& -0.5\\ -0.5& 0 & 0 \end{bmatrix}$ The eigen values of the above matrix are: $-0.5, 0.5, 1.5$ $0.5, 0.5, 1$ $1.75, -1, 0.5$ $-0.5, 0.5, -1$
Consider the following matrix:$\left [ A \right ]=$ $\begin{bmatrix} 1.5&0 &1 \\ -0.5 & 0.5& -0.5\\ -0.5& 0 & 0 \end{bmatrix}$The eigen values of the above matrix are:$-0...
710
views
answered
Feb 3, 2017
GATE
tbb-mockgate-1
matrix
eigen-value
linear-algebra
+
–
0
votes
2
MadeEasy Subject Test: Theory of Computation - Regular Languages
Why L3 is not regular??
Why L3 is not regular??
488
views
answered
Jan 6, 2017
Theory of Computation
made-easy-test-series
theory-of-computation
regular-language
+
–
–1
votes
3
GATE CSE 2001 | Question: 1.14
Randomized quicksort is an extension of quicksort where the pivot is chosen randomly. What is the worst case complexity of sorting n numbers using Randomized quicksort? $O(n)$ $O(n \log n)$ $O(n^2)$ $O(n!)$
Randomized quicksort is an extension of quicksort where the pivot is chosen randomly. What is the worst case complexity of sorting n numbers using Randomized quicksort?$O...
13.6k
views
answered
Oct 27, 2016
Algorithms
gatecse-2001
algorithms
sorting
time-complexity
easy
+
–
3
votes
4
GATE IT 2004 | Question: 13
Let $P$ be a singly linked list. Let $Q$ be the pointer to an intermediate node $x$ in the list. What is the worst-case time complexity of the best-known algorithm to delete the node $x$ from the list ? $O(n)$ $O(\log^2 n)$ $O(\log n)$ $O(1)$
Let $P$ be a singly linked list. Let $Q$ be the pointer to an intermediate node $x$ in the list. What is the worst-case time complexity of the best-known algorithm to del...
24.6k
views
answered
Oct 23, 2016
DS
gateit-2004
data-structures
linked-list
normal
ambiguous
+
–
5
votes
5
GATE CSE 2008 | Question: 77
Delayed branching can help in the handling of control hazards The following code is to run on a pipelined processor with one branch delay slot: I1: ADD $R2 \leftarrow R7 + R8$ I2: Sub $R4 \leftarrow R5 – R6$ ... Which of the instructions I1, I2, I3 or I4 can legitimately occupy the delay slot without any program modification? I1 I2 I3 I4
Delayed branching can help in the handling of control hazardsThe following code is to run on a pipelined processor with one branch delay slot:I1: ADD $R2 \leftarrow R7 + ...
15.2k
views
answered
Sep 16, 2016
CO and Architecture
gatecse-2008
co-and-architecture
pipelining
normal
+
–
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