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In an $SR$ latch made by cross-coupling two NAND gates, if both $S$ and $R$ inputs are set to $0$, then it will result in

  1. $Q = 0, Q' = 1$
  2. $Q = 1, Q' = 0$
  3. $Q = 1, Q' = 1$
  4. Indeterminate states

9 Answers

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0 votes
IF ONE OF THE INPUT TO NAND GATE IS 0 THEN THE OUTPUT IS 1

SO Q=Q0=1
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0 votes

In an S'R' Latch, when S and R  = 0, We get both Q and Q' = 1. (Option C)

After that, if we access memory state, ie, set S and R = 1, we get indeterminate output. (Option D).

 

So, Option C is the immediate consequence of trying to access the forbidden state, and Option D would come later if we try to access memory state after accessing the forbidden state.

Hence, Option C.

Answer:

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