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Consider the following program segment for a hypothetical CPU having three user registers $R_1, R_2$ and $R_3.$ $$\begin{array}{|l|l|c|} \hline \text {Instruction}  &  \text{Operation }& \text{Instruction size} \\&& \text{(in words)} \\\hline \text{MOV $R_1,5000$} & \text{$R_1$} \leftarrow  \text{Memory$[5000]$}& \text{$2$} \\\hline\text{MOV $R2(R1)$} & \text{$R2$} \leftarrow  \text{Memory$[(R_1)]$}& \text{$1$} \\\hline \text{ADD $R_2,R_3$} & \text{$R2$} \leftarrow  \text{$R_2 + R_3$} & \text{$1$} \\\hline \text{MOV $6000,R_2$} & \text{Memory$[6000]$} \leftarrow  \text{$R_2$} & \text{$2$} \\\hline \text{HALT} & \text{Machine Halts} & \text{$1$} \\\hline \end{array}$$Consider that the memory is byte addressable with size $32$ bits, and the program has been loaded starting from memory location $1000$ (decimal). If an interrupt occurs while the CPU has been halted after executing the HALT instruction, the return address (in decimal) saved in the stack will be

  1. $1007$
  2. $1020$
  3. $1024$
  4. $1028$
in CO and Architecture by Veteran (52.1k points)
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1 Answer

+52 votes
Best answer

Option is D.

Word size is $32$ $bits$ ($4$ $bytes$). Interrupt occurs after execution of HALT instruction NOT during,  So address of next instruction will be saved on to the stack which is $1028$.  

(We have $5$ instructions starting from address $1000$, each of size $2, 1, 1, 2, 1$ totaling $7$ words $= 7 *4 =28$ $bytes$). 

$1000+ 28 = 1028$,

$1028$ is the starting address of NEXT Instruction .

After HALT instruction CPU enters a HALT state and if an interrupt happens the return address will be that of the instruction after the HALT. 

 References :

  1.  https://x86.puri.sm/html/file_module_x86_id_134.html [ X86 Instructors Manual ]
  2. http://electronics.stackexchange.com/questions/277735/what-happens-if-the-interrupt-occurs-during-the-execution-of-halt-instruction
by Boss (13.4k points)
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0
@Bikram sir when memory is word addressable of size 32 bits. Then why are you treating it as byte addressable?
+1

Lots of speculation as to which is correct : 1024 or 1028. 

Read this on x86 instruction set reference

http://c9x.me/x86/html/file_module_x86_id_134.html

Answer should be 1028

0
nice link abhisek
0
now it is clear how 1028 will be the answer thanks bikram sir
0
what is the ans in answer key of gate paper.
0

I am still confused! after reading all these references:

The references says:

If an interrupt (including NMI) is used to resume execution after a HLT instruction, the saved instruction pointer (CS:EIP) points to the instruction following the HLT instruction.

But in the question it is no where mentioned that this interrupt is used to get the system out of the halted state! it just says that interrupt occurs after the execution of halt instruction. what if it is some other interrupt?

and what if the reset instruction is used to get the system out of the halted state?

0

@Bikram sir,

Although I understood the solution. The link you provided as a reference is not working.

0
In above question if halt occurred during the execution of the halt instruction than what could be the return address pushed onto the stack
Answer:

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