Utsav09
asked
Jan 27, 2018
191
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virtual gate
Consider a 4 way set associative memory with 16 cache blocks, the memory block requests are in the order (0,255,1,4,3,8,133,159,216,129,63,8,48,32,73,92,155). Which of the following memory block will not be in the cache if LRU is used ?
Consider a 4 way set associative memory with 16 cache blocks, the memory block requests are in the order (0,255,1,4,3,8,133,159,216,129,63,8,48,32,73,92,155). Which of th...