# MadeEasy CBT 2017: CO & Architecture - Dma

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edited

One Cycle takes 500ns.

First we calculate total number of cycle to transfer one byte of data from IO.

Transfer of control from processor to Io and IO to processor takes 250 ns that means 1/2 cycle for each transfer of control .

Given data transfer speed is 50KBps

50 KB data is transfered in --------> 1 second

1KB data can be tranfered in-------> 1/50 second

1 Byte data can be transfered in ---->1/(50*1024) seconds

or

1 byte data can be transferd in ---------> (1*10^9)/(50*1024) ns =>19531.25 ns

or

total no of cycle used in 1 byte data transfer ----->19531.25/500 =39.0625 cycles

So, total cycle used in 1 byte data transfer =( cycle used in control transfer from processor to io + cycle used in 1 byte transfer  + transfer of control from io to processor)

=(1/2  +  39.0625 +  1/2)

=40.0625 cycles

total cycle for 128 byte data transfer = 128 * 40.0625

= 5128 cycles

total time = 5128*500 ns

=2564000 ns

=2.564 ms

In burst mode- the transfer is totally given to i/o device, so time taken to give control to i/o and back to c.p.u =  250+250=500ns

to transfer 128 bytes time required = 128/50K => 2.56ms

total time= 2.56ms+500ns~=2.56ms

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