Increasing the cache line size brings in more from memory when a miss occurs. If accessing a certain byte suggests that near by bytes are likely to be accessed soon (locality), then increasing the cache line essentially prefetches those other bytes. This, in turn, prevent later cache miss on those other bytes.
If misses occur because the cache is too small, then the designers should increase the size .
Conflict misses occur when multiple memory locations are repeatedly accessed but map to the same cache location.
Consequently, when they are accessed, they keep kicking one another out of the cache. Increasing the associativity implies that each chunk of the cache is effectively doubled so that more than one memory item can rest in the same cache chunk.