Question

Consider a hypothetical processor which support both 1 address and zero address instruction. It contain 6 bit instruction and four bit address if there exists 2 one address instruction than how many zero address instruction can be formulated?

Answer 1

6 bit instruction, so totally we can have $2^6 = 64$ possible encodings.

There are 2 one address instructions, which would take $2 \times 2^4 = 32$ encodings as an address is of 4 bits. The remaining 32 encodings can be used for zero address ones and since they don't need any address part, each of them can be a separate instruction. So, answer should be 32.

Comments

sir , 

it is given that 6 bit instruction in which 4 bit is alloted for adress point of view and 2 one adress is which is 2¹=2 is one address and remaining 3 bit outoff 4 bit is used for 0 adresses so 2³=8 is the no of 0 address instruction will be plzzz plzzz sir check my solution

---

No, that is not correct. We have to consider all possible encodings possible to maximize the no. of possible instructions.

Answer 2

The address size is 4 bit.

For one address instruction, we can use 2 bit for opcode. So 4 one address instructions are possible. As per the problem, there are only 2 one address instructions. Rest 2 opcode can be used as zero address instruction. As there is no address field in zero address instruction, so 4 bit can be used as opcode.

Total number of zero address instruction is 2*16 = 32