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F= PQ+ QR+ RS+ST.

i) What is the minimum number of NAND gates required to implement F?

ii) What is the minimum number of NOR gates required to implement F?

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The given F is in SOP form and it can be implemented using 5 NAND gates.

1 NAND to implement each term and 1 NAND for ORing the terms.

Now, we simplify the expression to get the POS form so that it can be implemeted using NOR directly.

F

=PQ+ QR+ RS+ST

=Q(P+R) + S(R+T)

=[ Q(P+R) + S ] . [ Q(P+R) + (R+T) ]

= [ (S+Q) . (S+P+R) ] . [ (R+T+Q) . (R+T+P) ]

This is in POS form and can be implemented using 5NOR gates directly - 1 NOR for each term and 1 NOR for ANDing the expressions.

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9 NAND gates are required .

18 NOR gates required

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