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Is CPI of non pipeline processor 6, means non pipeline processor has 6 stages?

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Consider a non-pipeline system has a clock rate 4 GHz and an average CPI of 6. System is enhanced to a 8 stage pipelined processor. The clock rate is reduced to 2 GHz in the new processor. Speedup of a pipelined processor is _________.

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In a non pipelined processor there are no stages. CPI i.e cycles per instruction defines the no of clock cycles required to execute a instruction completely as a whole. And if such a processor is converted to a pipelined processor then clock cycles per stage and no of stages vary from implementation to implementation.

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