Consider a 16-way set-associative cache with data words are 64 bits long and words are addressed to the half-word. The cache holds 2 Mbytes of data and each block holds 16 data words. Physical addresses are 64 bits long, How many bits of tag, index, and offset are needed to support references to this cache?
Can someone please explain what do we we mean by words are addressed to the half-word in the above question?