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GATEBOOK MOCK TEST 1

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A processor with a word addressable memory has a two-way set associative cache. A cache line is one word and, so a cache entry contains a set of words. If there are M words of memory and C cache entries, How many words of memory map to the same cache entry?

 

(A) C/2

(B) M/2C

(C) M/C

(D) 2M/C
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Answer should be option C ie M/C

Coz it is nothing but the size of TAG and number of words of memory mapped to the same cache entry is nothing but the words having same TAG bits.

So M/C should be the correct answer.
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