Paging

Question

Consider a computer system that implements physical address of 26-bits and page size of 16 KB. The processor contains TLB which can hold 128 page table entries and is 4-way set associative. The maximum page table size is 8 MB. If the page table entry contains a valid bit,  a dirty bit, 2 page protection bit and translation, then the minimum TLB tag bits supported by the system is _________.

Comments

Is the answer 17 bits?

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@ Aditya If my answer is correct then I will explain for sure.

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How did you get 17-bits? Please explain? Your answer is correct.

Answer 1

Although it is not explicitly mentioned but it can be observed from the given information that the cache is virtually tagged instead of physically tagged. Thus we need to find the VA bits. 

Now VA = | PageNo | PageOffset |

We have Page Size = 16KB. Thus PageOffset = 14 bits

We need to calculate bits for PageNo. Now,

PageTableSize = NoOfPageTableEntry * PTE (Page table entry size)   - (1)

Now we need to calculate PTE size.

PA = 26 bits  | FrameNo | FrameOffset |

FrameOffset = PageOffset = 14 bits

Thus FrameNo = 12 bits

PTE = FrameBits + Valid + Dirty + Protection = 12 + 1 + 1 + 2  = 16 bits = 2 B

Substituting in equation (1)

8 MB = NoOfPageTableEntry  *  2 B

NoOfPageTableEntry = 4 M = 2²²

Now VA  = | 22 bits | 14 bits |

TLB entry = Total Cache Line(TCL) = 128 SetAssoc(SA) = 4 way

Total Set - TCL/SA = 2⁵

VA  = | Tagbits | SetNo | BlockOffset |

      = |   17 bits       |  5   bits    |   14  bits           |

Comments

what is the meaning of physical tagged and virtual tagged. please explain.

Answer 2

i got 8 bit  ..whats the ans???

Answer 3

We are given maximum table size and page table entry from that we can find no. Of entries which is 2²² . So the number of pages in sytem gives virtual adress as 22+14=36 bits. But for TLB only 22 bits are needed to search TLb.

Now bits required for set is 5 bcoz 128/4=32= 2⁵.

There will be no offset here. 

Therefore answer is

22-5 = 17 bits for TAG.