The following sequence of instruction is executed in a basic 5 stage pipelined processor (S1, S2, S3, S4, S5). Assume that data dependency present in the program is resolved by operand forwarding techniques. Load instruction output present in 4th stage ALU instruction output is available in 3rd stage. Assume each stage take 1 cycle.
$I_{1}:ADD R_{0},R_{1},R_{2}$
$I_{2}:LOAD R_{4}, 1(R_{0})$
$I_{3}: ADD R_{5},R_{4},R_{0}$
$I_{4}: ADD R_{6},R_{5},R_{4}$
$I_{5}: ADD R_{7},R_{5},R_{4}$
What is the number of instructions must be inserted to achieve CPI = 1 by using operand forwarding.