Answer is (C)
Overflow is said to occur in the following cases
$$\begin{array}{|c|c|c|} \hline C_{7} & C_{6} &\text{Overflow} \\\hline0&0& \text{NO}\\ 0&1& \text{YES} \\ 1&0&\text{YES} \\ 1&1&\text{NO} \\\hline \end{array}$$
The $3^{\text{rd}}$ condition occurs in the following case $A_{7}B_{7}S_{7}',$ now the question arises how?
$$\begin{array}{|c|c|c|} \hline C_{7} & C_{6} \\\hline A_{7} &1\\\ B_{7} &1 \\ S_{7} & 0 \\\hline \end{array}$$
NOW, $A_{7}=1$ AND $B_{7}=1, S_{7}=0$ is only possible when $C_{6}=0$ otherwise $S_{7}$ would become $1$.
$C_{7}$ has to be $1 (1+1+0$ generates carry$)$
ON similar basis we can prove that $C_{7}=0$ and $C_{6}=1$ is produced by $A_{7}'B_{7}'S_{7}$. Hence, either of the two conditions cause overflow. Hence (C).
Why not A? when $C_{7}=1$ and $C_{6} =1$ this doesn't indicate overflow ($4^{\text{th}}$ row in the table)
Why not B? if all carry bits are $1$ then, $C_{7}=1$ and $C_{6}=1$ (This also generates $4^{\text{th}}$ row)
Why not D? These combinations are $C_{0}$ and $C_{1}$, the lower carrys do not indicate overflow