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Consider a two-level cache hierarchy with $L1$ and $L2$ caches. An application incurs $1.4$ memory accesses per instruction on average. For this application, the miss rate of $L1$ cache is $0.1$; the $L2$ cache experiences, on average, $7$ misses per $1000$ instructions. The miss rate of $L2$ expressed correct to two decimal places is ________.

Hope this helps.

Answer = $0.05$.

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@stoneheart don’t you think this is very ambiguous per 1000 inst, I by default assumed they said it for L2 cache that 7 miss per 1000 instruction so I solved like this, say we have 100 inst then 10 will sent to L2 and then 10*7/1000 would be miss in there so globally .07/100 will be miss rate
thanks
Note:

Most of the time Miss rate is always based on number of memory references…
total number of memory reference = 1000 * 1.4 = 1400

reference to l2 cache = .1 * 1400 = 140

now miss rate = 7/140 = .05
Best explanation found

Since , it is given in question that for 1 instruction it takes 1.4 memory access(ma)

So, for 1000 instr. it will take =1000* 1.4 ma= 1400 ma

Now , it is given for l1 cache miss rate(mr) = 0.1

and since , we know mr=no. of misses/total no. of ma

so, 0.1=no. of misses/1400

thus, no. of misses of l1 =140

As , we know when there is miss in l1 , we search for data in l2

so, now for l2 cache total no. of ma=140, and it is given there is 7 miss

so , mr for l2 cache=7/140=1/20=0.05
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As , we know when there is miss in l1 , we search for data in l2

Thank you. This clearified my doubt :)

Welcome

I really think that for an exam as prestigious as GATE, this question is worded very poorly.

the L2 cache experiences, on average, 7 misses per 1000 instructions. The miss rate of L2 expressed correct to two decimal places is ....

One can argue that it is 7/1000 = 0.007

I.e. per 1000 instructions given to L2, it misses 7 of them.

But the question actually says, per 1000 instructions given to L1L2 ultimately misses 7 of them.

So, give L1 1000 instructions

=> 1400 memory accesses

=> Missed 140 memory accesses.

These 140 accesses would pe passed through L2 because of the hierarchy, and L2 would miss 7 of them.

So miss rate of L2 = 7/140 = 0.05.

PS: If 0.05 wasn't in the official answer key, I'd never have believed it to be the answer. One of the rare poorly worded GATE question.

Thanks for this “But the question actually says, per 1000 instructions given to L1L2 ultimately misses 7 of them”. :)

Where that line is written?