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Consider a combination of T and D flip-flops connected as shown below. The output of the D flip-flop is connected to the input of the T flip-flop and the output of the T flip-flop is connected to the input of the D flip-flop.

Initially, both $Q_{0}$ and $Q_{1}$ are set to 1 (before the 1st clock cycle). The outputs

  1. $Q_{1}Q_{0}$ after the 3rd cycle are 11 and after the 4th cycle are 00 respectively.
  2. $Q_{1}Q_{0}$ after the 3rd cycle are 11 and after the 4th cycle are 01 respectively.
  3. $Q_{1}Q_{0}$ after the 3rd cycle are 00 and after the 4th cycle are 11 respectively.
  4. $Q_{1}Q_{0}$ after the 3rd cycle are 01 and after the 4th cycle are 01 respectively.
in Digital Logic by Veteran (431k points)
edited by | 3.9k views

6 Answers

+24 votes
Best answer

Since it is synchronous so,
After every clock cycle T will toggle if input is 1 and Hold State if input is 0...D's Output always follows input

  • After 1 clock cycles :  Q1=0(Toggle)  Q0=1
  • After 2 clock cycles :  Q1=1(toggles) Q0=0
  • After 3 clock cycles:   Q1=1(hold)     Q0=1
  • After 4 clock cycles:   Q1=0(toggles) Q0=1

Hence, option (B) is correct.

by Active (3.4k points)
edited by
0
Oh thank god! I was going nuts over last year solution given by a coaching institute. Finally! my answer matched.. It worked :-)
0
can you please explain in detail.. what happens in one clock cyle exactly ?

I am getting something wrong: after 1st clock cyle,  Q0 will go to T input, so

Q1 will become 0 and that 0 will be input for D flip flop , so Q0 should also

be 0 . where am I going wrong? please explain.
+1
I got my mistake now. After 1st clock pulse, only first flip flop's output will appear and that output of T flip flop will be used by D flip flop in 2nd clock.
+30 votes

Answer: (B)

by Active (1.3k points)
–1
initially they are 1 ... BUT u hv initialised 0 ...
0
nice approach
0
D1 & T1

D1 ko 0011

T1 ko 0101 hi q assign Kiya h ?

Vice versa q ni?
0
This is truly amazing. Thanks! It should be selected as the answer in my opinion.
0

Thank you for state diagram. It really helps in understanding :)

If anyone still not able to understand, you should try this

    

0
Values of $Q_0$ in the table is incorrect?

Can you please check @satbir.
0

I think they are correct @CSHuB

+1 vote
We can also solve it in less time using the characteristic equation of D and T flip flop.

We denote T FF output by Q1 and D FF output by Q0.

Now , Q1N = Q1 EXOR T = Q1 EXOR Q0

 and Q0N= D = Q1

Initailly Q1=Q0=1

Q1     Q0        Q1N     Q0N

1       1            0           1          1st clock cycle

0        1         1            0              2nd

 1       0            1           1                    3rd

1          1        0            1                        4th

Hence the answer -     11,O1    option B
by Active (4.7k points)
+1 vote

Option (B) is correct

by Loyal (5.7k points)
0
why you have not taken value of input to D flipflop as 0 , because it toggles , why initial input to  of D flipflop is taken  as 1 and not zero .
0 votes

In this question it is clearly told Q1 and Q0 value 1

But nothing told about value of T and D initially

So, we take T and D as 0 and as well as take T and D as 1, and need to check the value

Now to desceribe

firstly, Q0=1 which is connected to FF T and makes Q1=1(because Q0 passes through T=0 and no toggle will be there) But before making Q1as 1,it passes through T FF ,it and makes value of FF T as 1.

In the mean time Q1 previous value which was 1 passes through D FF and makes it 1 and changes Q0 value as 0(as Q0 depends on D FF value , and not the previous input value)

So, 1st clock cycle completed here

In 2nd clock cycle similarly Q0=0 pass through T=1 and makes Q1=1 and T will be 0 now

Now, Q1 which was 1 pass through D FF and go for furthur

For more clearity , check the picture

For  taking T and D as 1 both picture will be like this

So, T and D both 1 will not work in this case

We have to take both FF as 0 initially

Then option B will only give correct value

by Veteran (119k points)
edited by
0

Another easy way to do this

same as https://gateoverflow.in/8287/gate2015-1-37

0
why you have not taken value of input to D flipflop as 0 , because it toggles , why initial input to  of D flipflop is taken  as 1 and not zero .
0 votes

Ans: (B)

The state table can be constructed from given flip flop diagram as:

State Table
D T Q0 Q1 Q0N Q1N
0 0 0 0 0 0
1 0 0 1 1 1
0 1 1 0 0 1
1 1 1 1 1 0

State Transition Diagram is

After 3rd Cycle Q1=1 & Q0=1.

After 4th Cycle Q1=0 & Q0=1.

Therefore, Answer is (B) Option.

by (289 points)
Answer:

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