25 votes

Consider a combination of T and D flip-flops connected as shown below. The output of the D flip-flop is connected to the input of the T flip-flop and the output of the T flip-flop is connected to the input of the D flip-flop.

Initially, both $Q_{0}$ and $Q_{1}$ are set to 1 (before the 1^{st} clock cycle). The outputs

- $Q_{1}Q_{0}$ after the 3
^{rd}cycle are 11 and after the 4^{th}cycle are 00 respectively. - $Q_{1}Q_{0}$ after the 3
^{rd}cycle are 11 and after the 4^{th}cycle are 01 respectively. - $Q_{1}Q_{0}$ after the 3
^{rd}cycle are 00 and after the 4^{th}cycle are 11 respectively. - $Q_{1}Q_{0}$ after the 3
^{rd}cycle are 01 and after the 4^{th}cycle are 01 respectively.

29 votes

Best answer

Since it is synchronous so,

After every clock cycle **T will toggle if input is 1** and **Hold State if input is 0**...D's Output always follows input

**After 1 clock cycles : Q1**=0(Toggle)**Q0**=1**After 2 clock cycles : Q1**=1(toggles)**Q0**=0**After 3 clock cycles: Q1**=1(hold)**Q0**=1**After 4 clock cycles: Q1**=0(toggles)**Q0**=1

Hence, option **(B)** is correct.

0

Oh thank god! I was going nuts over last year solution given by a coaching institute. Finally! my answer matched.. It worked :-)

33 votes

1

Thank you for state diagram. It really helps in understanding :)

If anyone still not able to understand, you should try this

0

Here, initial state in transition diagram is Q1Q0=11 counting starts from here.....

To add more properties here, the counter is not self starting and not free running.

**Note**: **Self starting: It means irrespective of initial state we can enter into counting loop(1-2-3-1..) but in this from 0 we can't enter into loop.**

** Free running: It means to count all the states in the counting loop in this we can't count 0 as it is isolated from loop**

*Also, every free running is self starting but converse need not hold.*

2 votes

We can also solve it in less time using the characteristic equation of D and T flip flop.

We denote T FF output by Q1 and D FF output by Q0.

Now , Q1N = Q1 EXOR T = Q1 EXOR Q0

and Q0N= D = Q1

Initailly Q1=Q0=1

Q1 Q0 Q1N Q0N

1 1 0 1 1st clock cycle

0 1 1 0 2nd

1 0 1 1 3rd

1 1 0 1 4th

Hence the answer - 11,O1 option B

We denote T FF output by Q1 and D FF output by Q0.

Now , Q1N = Q1 EXOR T = Q1 EXOR Q0

and Q0N= D = Q1

Initailly Q1=Q0=1

Q1 Q0 Q1N Q0N

1 1 0 1 1st clock cycle

0 1 1 0 2nd

1 0 1 1 3rd

1 1 0 1 4th

Hence the answer - 11,O1 option B

1 vote

0 votes

In this question it is clearly told Q1 and Q0 value 1

But nothing told about value of T and D initially

So, we take T and D as 0 and as well as take T and D as 1, and need to check the value

Now to desceribe

firstly, Q0=1 which is connected to FF T and makes Q1=1(because Q0 passes through T=0 and no toggle will be there) But before making Q1as 1,it passes through T FF ,it and makes value of FF T as 1.

In the mean time Q1 previous value which was 1 passes through D FF and makes it 1 and changes Q0 value as 0(as Q0 depends on D FF value , and not the previous input value)

So, 1st clock cycle completed here

In 2nd clock cycle similarly Q0=0 pass through T=1 and makes Q1=1 and T will be 0 now

Now, Q1 which was 1 pass through D FF and go for furthur

For more clearity , check the picture

For taking T and D as 1 both picture will be like this

So, T and D both 1 will not work in this case

We have to take both FF as 0 initially

Then option B will only give correct value