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Consider a RISC machine where each instruction is exactly $4$ bytes long. Conditional and unconditional branch instructions use PC-relative addressing mode with Offset specified in bytes to the target location of the branch instruction. Further the Offset is always with respect to the address of the next instruction in the program sequence. Consider the following instruction sequence
$$\begin{array}{ll} \text{Instr. No.} & \text{Instruction} \\\hline  \text{i:} & \text{add R2, R3, R4} \\   \text{i+1:} & \text{sub R5, R6, R7} \\  \text{i+2:} & \text{cmp R1, R9, R10}  \\ \text{i+3:} & \text{beq R1, Offset}  \\ \end{array}$$
If the target of the branch instruction is $i,$ then the decimal value of the Offset is ____________ .
asked in CO & Architecture by Veteran (407k points)
edited by | 3.9k views
0
@Arjun Sir

For some reason the question is not visible on my screen..It is happening with a lot of questions..Has anyone else also experienced the same?
+1
question is to be uploaded only..
–1
I kept -4 in the exam :(
0
same for me also
+1
@arjun sir, In gateoverflow mock interface when I was giving GATE 2017 SET 1 Paper, the questions were not well visible, options were not separated with entering[new line], everything was in like 1 paragraph including options.
0
What should the correct answer actually be ?

Should it be 16 or -16 ?

I am asking this since the question asks us to give the decimal value of the Offset.
+1

@the_bob

PC relative addressing mode = PC + offset

if you keep +16, you will forward to 4th instruction from PC

if you keep -16, you will backward to 4th instruction from PC

0
Pls check if this reasoning is correct or not:

Every instruction is 4B long. There are 4 instructions. Offset wants to refer to the beginning while it is at the end so it has to go back 16B (4B X 4) as the offset is in Bytes (as per Q).

So the offset stores (-16) because PC has to add this value to get there.

2 Answers

+25 votes
Best answer

Answer is -$\bf{16.}$

Program Counter is updated with the address of next instruction even before the current instruction is executed.

That is why the question says that the address of the next instruction is updated with next instruction in sequence.

Before executing instruction $\bf{i + 3}$, the current state looks as under:

Please note: BEQ instruction is for Branch Equal

Question says that the target of branch instruction is 'i' which is at $2000$ in our example.

So, we need to go to address $\bf{2000}$ from address $2016$ (which is currently pointed by PC)

$\bf{2016 - 2000 = 16}$

So, we have to specify Offset as -$16$ which would mean that $16$ should be subtracted from next address instruction ($2016$).

answered by Loyal (5.3k points)
edited by
+2

So, we have to specify Offset as -16 which would mean that 16 should be subtracted from next address instruction (2000).

I think its a typo. Shouldn't it be 2016 ? 

0
what does cmp R1,R9,R10 DOES?
0

@sushmita

no need to bother about it, it doesn't need to solve this question, that's why they didn't defined it !

+14 votes
Ans:(-16)

assume addresses start with $2000$ for the first instruction.

$2000---\text{add }R2,R3,R4$

$2004---\text{sub }r5,r6,r7$

$2008---r1,r9,r10$

$2012---\text{beq } r1,$offset  //pc after instruction fetch of this instruction will be $2016$,
and branch target is $2000,$offset will be $(2016-16)=2000$

$2016$------next instruction
answered by Active (4.6k points)
edited by
0
yup i did same..i think its correct as nothing mentioned so byte addressable
0

See in question"offset in bytes".it should be correct.

+1
yes i am also saying its correct only... :)
0
offset is address of next instruction in program sequence.

what will be next instruction here?

i+1 or when again control comes back to i
+2
@Srestha,i didn't get you.So i try to simplify it.

When processor is executing instruction on 2012 at that time pc will contain value 2016 which is address of next instruction to be executed in a serial way.

But instruction at address 2012 is branch instruction whose target is 2000.

So,we want to branch at address 2000,and currently pc contain address 2016,in that way value of offset is -16 with respect to pc.

 

Hope it clear your doubt.
0
that I understood

I mean

u r telling in address 2000- one instruction started

in 2004-same instruction, 2008-same instruction,2012-same instruction.

then in 2016 next instruction.

 

but why it is not correct 2000-is one instruction and in 2004-next instruction?

as it is given address 2000 contain instruction i and address 2004 contain instruction i+1

So, should 2004 not contain next instruction?
+1
Yes,there are different instructions at different addresses and each of 4 byte.

Branching is done at i+3 instruction with refrence to current pc or next instruction.

i----2000 to 2003

i+1----2004 to 2007

i+2----2008 to 2011

i+3---2012 to 2015----this is the branch instruction.

i+4---2016 to 2019

.

.

.

So on.

 

 

still confused ? Then Message me.
0
offset mtlbb??
Answer:

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